Psoc 5 delsig Muxing

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ChUn_1138526
Level 1
Level 1

I have been trying to use one del-Sig ADC to sample several sources.... And I ran into some problems:

I was using EOC bit feeding a Status Register to let me know when the ADC is done a conversion (with anticipation of future expansion for UDB functionality instead of the status register). On single channel, this seemed to work. However, when using more than one channel, I didn't seem to get any meaningful results. In one case, I got zeros. In another case, it seemed that it wasn't actually switching the source properly, despite the MUX being independent to the ADC.  However, I just learned that the EOC bit that I had feeding a status register doesn't work, as per https://community.cypress.com/thread/19402?q=delsig%20mux .Now that I'm using "ADC_DelSig_IsEndConversion(ADC_DelSig_WAIT_FOR_RESULT)", my ADC seems to be working correctly. But... I read that "

The DSI routable signal does not work.

...

FIX STATUS
Silicon revision fix available in ES2.

"

...so did this never get fixed?

I also noticed in an example from Psoc a different order of operations than I preform...

My Order of Operations:

1. Select Mux

2. Start Convert

3. Wait until finished

4. Get result

5. Stop Convert

Cypress Psoc Example Order of Operations:

1. Select Mux

2. Start Convert

3. Wait until finished

5. Stop Convert

4. Get Result

Is there any particular reason they stop the conversion before getting the result? I was under the impression that stopping the conversion flushes the ADC, which is why I didn't/don't do it that way, as I assumed that the ADC result may get recycled. However, it seems just fine in the example? So... If I did it my way, is there anything wrong with that? Could the result get overwritten by a new result, if I don't grab it fast enough? Why doesn't their result get overwritten by the stopconvert? What am I missing here?

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1 Solution
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Hi,

I've reread the datasheet.  I do not believe the ADC is 'flushed'.  The note for ADC_StopConvert() reads: "Forces the ADC to stop all conversions. If the ADC is in the middle of a conversion, the ADC will be reset and not provide a result for that partial conversion."

I understand this to mean that if the ADC was in the middle of a conversion, the partial result will be reset.  Therefore, Cypress recommends you look to see if the Conversion is complete, then Stop the conversion to prevent reading the result while in the middle of a conversion.

Theoretically, you can read the ADC result without stopping the conversion of the next sample.  However, the risk can be that if it is in the middle of a conversion of a > 8 bit result, one of the bytes might contain the result of the current conversion and the other byte from the previous conversion.  This is called a "coherence issue".  Sadly, due to various reasons, a multi-byte ADC is not atomic.

Len

Len
"Engineering is an Art. The Art of Compromise."

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3 Replies
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Hi,

I've reread the datasheet.  I do not believe the ADC is 'flushed'.  The note for ADC_StopConvert() reads: "Forces the ADC to stop all conversions. If the ADC is in the middle of a conversion, the ADC will be reset and not provide a result for that partial conversion."

I understand this to mean that if the ADC was in the middle of a conversion, the partial result will be reset.  Therefore, Cypress recommends you look to see if the Conversion is complete, then Stop the conversion to prevent reading the result while in the middle of a conversion.

Theoretically, you can read the ADC result without stopping the conversion of the next sample.  However, the risk can be that if it is in the middle of a conversion of a > 8 bit result, one of the bytes might contain the result of the current conversion and the other byte from the previous conversion.  This is called a "coherence issue".  Sadly, due to various reasons, a multi-byte ADC is not atomic.

Len

Len
"Engineering is an Art. The Art of Compromise."
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I was under the impression that the ADC needs to flush itself to prevent contamination between different sources. However, I guess that wouldn't flush the ADC data register, so I guess my question is mute.

Pursuant to the ADC question -> leaving the ADC run for any length of time could result in a current ADC data register bit being contaminated? Or does the ADC have a buffer, so the output data frame only gets updated after the internal frame fully captures a measurement? I guess I'm asking trivial questions now, so I should probably just go look it up if I'm curious.

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I don't believe the ADC_DelSig has a FIFO.  However, if you want to pursue it, you can create your own FIFO by assigning a DMA channel to it to dump the incoming measurements into a RAM buffer of the size of your choosing.

Len

Len
"Engineering is an Art. The Art of Compromise."
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