6 Replies Latest reply on May 31, 2019 7:58 AM by BragadeeshV_41

    Is there any difference between zero and one when it comes to setting the buffered compare register of the PSoC 4 Timer Counter Pulse Width Modulator (TCPWM) PSoC® Creator™ Component?

    JoWi_3984961

      Is there any difference between zero and one

      when it comes to setting the  buffered compare register

      of the PSoC 4 Timer Counter Pulse Width Modulator (TCPWM) PSoC® Creator™ Component?

       

      f(0) = f(1) ??

       

      From the data sheet we have:

       

      Note PSoC 4000 devices write the 16 bit compare buffer register with the decremented compare value in the Up counting mode (except 0x0u), and the incremented compare value in the Down counting mode (except 0xFFFFu).

       

      So let's say we are up counting.  We want zero.

      So, we must write a zero.

       

      Ok, now we are tired of zero.  We want ONE.  So, we write the "decremented" version of ONE, which is zero, again.

       

      What changed?

       

      (The other case, counting down, is similar, but perhaps worse?)

       

      I see the philosophy of one versus zero has changed on PSOC 4.  Where is this headed?

      .