I would like to use your HyperBus memory.
My board will contain cyclone V too.
My question is, how the clock pin in the HyperBus should be connected?
To a standard IO of the FPGA or to a dedicated CLK pin.
In our reference design of the HyperBus controller in FPGA, we use a standard IO for the HyperBus CLK. I think many of 3rd party HyperBus controller (for FPGAs) also use a standard IO.