In Warp Verilog, all registers are initialized to 0 by default. Also, Warp ignores the 'initial' construct, so no luck there. I see only way is to use a reset condition to initialize values to something non-zero.
You can assign register some value only inside 'always' block. You can refer to the section 2.3.2 (Register) of the Warp_verilog_reference book (page 10): https://www.cypress.com/file/326096/download . Without assigning any value the registers are initialized to zero.
In the above example, in order to assign value 3 to register count, reset variable has been used inside an 'always' block
Hello odissey & Ekta,
thank you for confirmation, I thought I've overseen it.