5 Replies Latest reply on May 7, 2019 2:41 AM by SrinathS_16

    a question about slave FIFO of FX3


      now I have a project, FPGA can write data to FX3(P to U), and I want to add a U to P channel based on this project. I suppose the PC can send data to the USB, and send it to the buffer of FX3,when the buffer is full,flagc will be pulled down and FPGA  will read the data from the buffer. In other word, it is a stream_out mode which is in the FX3 SDK , but i want it realize in my project(boss gives it me). According to the streamOUT source code, I choose the AUTO DMA mode and have added the state and flagc

      and flagd pin  in the GPIF designer. I have configure the flagc as the dedicate thread 3  and flagd  water mark is 3. Endpoint and DMA channel configuration have be done But somehow when the buffer is full flagc is not be pulled down.I have attached my project.SrinathS_16