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We do not have any code example as such.
But you could refer to the PDL documentation: System CLock-> Clock Trim (ILO, PILO)-> Functions. The function usage under Cy_SysClk_PiloTrim() trims the PILO with ECO.
You could change the ECO to AltHF clock for your application. You need to change CY_SYSCLK_MEAS_CLK_ECO to CY_SYSCLK_MEAS_CLK_ALTLF in the Cy_SysClk_StartClkMeasurementCounters() API.
You can also click on the API and refer to enum cy_en_meas_clks_t to know all the possible clock sources.
I hope this helps.
Do we have any guidance on how frequently we should be calling these functions to maintain the accuracy?
It is generally recommended to calibrate every 0.1 to 1 second to maintain the accuracy.