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I am terribly sorry for my mistake on previous thread's response. (I fixed the previous response)
In case of CC Voltages on Source Side, if No connect on CC lines, the voltage must above 2.75V.
At first glance, FW_3_2_1_1658 looks that do not meet the Spec, but it meets Spec and there is no problem.
FW_3_2_1_1658 is applied to deep-sleep mode to reduce the power consumption if there is no connection.
Hence, the CC toggle voltage is less than the very old FW.
If the cable is being connected on CC line, CCG state will leave from deep sleep mode.
There are questions about the following points.
>At first glance, FW_3_2_1_1658 looks that do not meet the Spec, but it meets Spec and there is no problem.
It says "it meets Spec". Is this a USB Type-C spec?
Or is it USB PD spec?
In the case of Type-C Spec, I think 2.75V is Spec as described earlier.
Is this outside the spec range for USB spec certification?
Type-C Spec. We are talking about Type-C Spec.
Again, FW_3_2_1_1658 meets the Spec requirements. No problem.
I described the reason on previous response.
I will put the reason again as follows with elaboration.
FW_3_2_1_1658 is applied to deep-sleep mode to reduce the power consumption (around 2.4V) if there is no connection.
If the connection event will be occurred, FW_3_2_1_1658 goes above 2.75V and meet the requirement.
I understand that it will be 2.75V or more at the time of connection event.
However, the unconnected state (vOPEN) is described in Type-C spec.
When the voltage at vOPEN is 2.4 V in the Electrical test of Type-C functional test below, does the test pass?
Or isn't vOPEN tested in the Electrical test?
-Universal Serial Bus Type-C (USB Type-C) Functional Test Specification
I am sorry for the ambiguous explanation.
Please let me give a chance to elaborate it again..
There are three state on Source Side (Powered cable/adapter (vRa), Sink (vRd), and No connect (vOPEN)).
I will use Table 4-25 for the explanation.
If the Source side CC voltage is 0.00V to 0.75V, Powered cable/adapter is connected.
If it is 0.85V to 2.45V, Source side recognizes that Sink (vRd) is connected to Source side.
If it is over 2.75V, Source side recognizes that detach the cable on Source side.
As you mentioned previous thread that once CC line will go over 2.75V when a cable is detached. Then, CCG3 recognizes that cable is detached and will enter deep-sleep mode.
The important thing is whether Type-C controller can detect and do transition each state appropriately based on Type-C Spec.
Therefore, CCG3 complies with Type-C Spec and there are no problem.
Test will pass.
FYI: If CCG3 has an issue on this behavior, a lot of customers have been struggling with it because we have already sold a lot of CCG3 chips to end customers.
Thank you for your reply.
From your answers, this spec is understood that the Source Role is the voltage value that detects each state.
When transitioning from the state of vRa or vRd to vOPEN (when cable was removed), the source recognizes the state of vOPEN because the CC voltage exceeds 2.75V.
It is correct.
Per Type-C spec 1.3 Table 4-20 Source CC Termination (Rp) Requirements, Rp voltage can go as low as 1.7 V with current source based Rp advertisement. So, 2.45 V is within the spec limit.
Row 2 "Sink (vRd)" on "CC Voltages on Source Side – 3.0 A @ 5 V" table you mentioned is the requirement for source to detect sink attach.