2 Replies Latest reply on May 21, 2019 10:38 PM by TakashiM_61

    CY8C5858AXI-LP035 Capture speed of Counter(UDB)




      We would like to confirm the Counter component for UDB mode.




      When the interrupt condition is "On_Capture",

      How long is the interrupt output pin delayed after the capture edge is met?




      How long is the response time of the Counter_ReadCapture() API?


      PSoC5LP Capture timing of Counter(UDBmode)


      We have synchronized digital circuits according to related articles in the past.



      (a) Count by Counter component
      (b) Capture the result by Capture edge input
      (c) Capture asynchronously by software (Because to avoid metastability from the above link)
      (d) Reading counter value in API

      It is processed by the above-mentioned flow.


      In the case of high-speed counting, the count value may shift infrequently.



      Capture is metastable,

      The firmware is reading asynchronously while counting,

      I am getting count value during capture,



      We do not know which of the above is the problem,


      Count => Capture => Read count value


      We would like to do the above series of processing.
      However, can this counter component not be realized if synchronized?

      Do you know the best way?