3 Replies Latest reply on Mar 13, 2019 1:41 PM by JeGr_4019896

    CY4532 Debugging

    JeGr_4019896

      I have loaded a single PDO into the CY4532 EVK and noticed that the there is a hard reset that occurs on the CC line after PD negotiations have taken place and the current draw is as expected. This reset lasts for about a second and the the PD devices renegotiate with no problem. I am wondering why this could be happening.

       

      I attempted to debug the EVK and step through the code to see if I could see the problem but when I run the debugger and get to the function, dpm_task(port), the debugger disconnects. Should I be able to step through the code this way?

        • 1. Re: CY4532 Debugging
          ShifangZ_26

          Hi ,

           

          Kindly refer my post second recommendation  on this thread. How to debug cypd3135 in cy4531?

           

          The way you debug is difficult to support, since you are using Bootloader +application project. If you would like to debug it with miniProg3, please kindly use no_boot project in your workspace.

          Best Regards,

          Lisa

          • 2. Re: CY4532 Debugging
            JeGr_4019896

            Hi Lisa,

             

            I was debugging with the noboot project and this is where I was running into problems. I was able to step through to a certain point, but then it crashed. It sounds like the UART debugger is more what I am looking for anyways as I can receive information as the PD negotiations are happening. Is this correct? Can you point me into the direction of where to find/ how to implement the UART debug tool.

             

            Also, I need support on my other problem. I have loaded a single PDO into the CY4532 EVK and noticed that the there is a hard reset that occurs on the CC line after PD negotiations have taken place and the current draw is as expected. This reset lasts for about a second and the the PD devices renegotiate with no problem. I am wondering why this could be happening.

             

            Thank you

            • 3. Re: CY4532 Debugging
              JeGr_4019896

              My setup is as follows: CY4532 EVK with 5V/3A Source PDO with iPad Pro 11" 3rd Generation.

               

              After negotiations are complete, there is a hard reset. After a period of time, the negotiation takes place again the EVK works as expected. I have included my CC log describing this behavior.

               

              CC Log.PNG

               

              I have tracked down what I believe to be the piece of code being called to display the hard reset.

               

                      case APP_EVT_TYPEC_ATTACH:

              #if CCG_REV3_HANDLE_BAD_SINK

                          /* Start bad sink timer */

                          timer_start(port, APP_BAD_SINK_TIMEOUT_TIMER, APP_AME_TIMEOUT_TIMER_PERIOD, app_bad_sink_timeout_cbk);