How did you measure the delay? If possible can you share your project ?
I solved the mystery and it turned out to be a silly problem. I was reading the 'delayed' output off a pin which in the particular kit I am using turns out to be grounded via a capacitor (for use with the SAR). And so my digital output was low-passed with a constant-ish slope which wasn't directly visible on a purely digital logic analyser. Throwing the output onto a different pin solved the issue.
- Digital Logic analysers often don't tell the whole story (especially if miscellaneous EE effects are involved)
- Don't assume that just because a kit's pin looks like a GPIO and can be configured as such by the IDE it actually is a GPIO