One of the nine SCBs, SCB to be precise, is slave only and requires an external clock. It only supports I2C or SPI-slave mode.
From the datasheet:
PSoC 63 has nine SCBs, which can each implement an I2C, UART, or SPI interface. One SCB will operate in Deep Sleep with an external clock, this SCB will only operate in Slave mode (requires external clock)
What do you plan to connect to these ports?
Would it be possible to combine both SPI channels (4 chip selects per SCB) or is it bandwidth limited?
There are other solution, like..
- Use the UDBs to generate a SPI or UART
- Use the SMIF in MIMO mode, that way it can be used as regular SPI without the memory management.
- Quite limited (simple shift register, only) can be generated with the SmartIOs.
Thanks for the answer - I did not pick up on that.
Where is that (SCB 8 is only slave) documented?
I had one SPIM using 4 slaves, but when the build errors happened I started removing stuff to debug the issue.
The requirements change based on where the board is deployed.
PsoC Creator does NOT show any non SCB SPI or UART.
If I see all components (SPI or UART) other than SCB SPI none show that they are compatible.
There are components like that for Psoc5lP but not for 6.
I am running PSoC Creator 4.2 (188.8.131.521).
Hi, you can find the SCB information in pinouts/multiple alternate functions section (Table 2: DS- deep sleep) of datasheet.