I believe that using ADC address ADC_SAR_WRK0_REG (more precise ADC_SAR_1_WRK0_REG if the name of the ADC is ADC_SAR_1) should work. Change amount of transfer bytes to 1.
No need to use a DMA 'wisard' or to modify DMA capability.
Thank you for your response. I do not completely follow what you mean. Am I supposed to configure the DMA on my own? Or just modify the bytes per burst to 1 and ignore the warning in the DMA wizard?
If I ignore the warning, and set bytes per burst to 1, I get the following:
/* Defines for DMA_SAR2VDAC */
#define DMA_SAR2VDAC_BYTES_PER_BURST 1
#define DMA_SAR2VDAC_REQUEST_PER_BURST 1
#define DMA_SAR2VDAC_SRC_BASE (CYDEV_PERIPH_BASE)
#define DMA_SAR2VDAC_DST_BASE (CYDEV_PERIPH_BASE)
/* Variable declarations for DMA_SAR2VDAC */
/* Move these variable declarations to the top of the function */
/* DMA Configuration for DMA_SAR2VDAC */
DMA_SAR2VDAC_Chan = DMA_SAR2VDAC_DmaInitialize(DMA_SAR2VDAC_BYTES_PER_BURST, DMA_SAR2VDAC_REQUEST_PER_BURST,
DMA_SAR2VDAC_TD = CyDmaTdAllocate();
CyDmaTdSetConfiguration(DMA_SAR2VDAC_TD, 1, DMA_SAR2VDAC_TD, 0);
CyDmaTdSetAddress(DMA_SAR2VDAC_TD, LO16((uint32)ADC_SAR_1_SAR_WRK0_PTR), LO16((uint32)VDAC8_1_Data_PTR));
If I set ADC_SAR_1_SAR_WRK0_PTR to ADC_SAR_1_SAR_WRK0_REG, it should work if I understood you correctly. If not, please let me know. For today, I will not be in the lab again to test this. Tomorrow, I will try if I can get an ouput on P0_6.
Unfortunately, the suggestion of /odissey1 did not work out as I would have hoped. Hence, I am still looking for a solution to drive the 8bit VDAC with a 8bit SAR ADC. Does anyone have an other idea in order to get the application working?
With kind regards,
Many thanks! This helps me very much in continuing my internship.
With kind regards,
One thing that I have noticed once I did some further testing with this is that it seems that the input for the SAR is not the same as the output of the VDAC. For the 4V VDAC range, the output is 2x the input of the SAR. For the 1V VDAC range, the output is half of the SAR input.
For this I have no answer yet and I am not sure if this is due to the way the DMA is writing data from the SAR to the VDAC. Do you perhaps know how this occurs?
With kind regards,
DMA transfers full-scale digital 8-bit from ADC to VDAC.
Full-scale analog ranges are: ADC input 0-2V, VDAC output either 0-1V or
0-4V, which are obviously do not match.
You can bring VDAC output to 2V scale by few ways: (a) set output scale to
4V and use /2 resistor divider; (b) set VDAC output scale to 1V and buffer
it using PGA with gain of 2; (c) set ADC scale to O-4V).
Typically this is not the issue, because some math is used between ADC and
VDAC and feedback path has it's own gain. It is hard to advise further, as
I don't know your application and converting ADC voltage to DAC 1:1 seems
having only educational value.
On Fri, Feb 22, 2019, 5:52 AM j.m.v.dam_3854156 <
That clarifies a lot! Quite logical explanation, so thank you for explaining.
My application is to develop a bidirectional optimal trajectory control algorithm for a series-resonant converter, quite a mouthfull, but a very interesting topic. This is for my internship at the Eindhoven University of Technology within the Power Electronics deparment of Electrical Engineering. The main result is to find out how interesting it is to implement control algorithms using, for instance, the PSoC 5LP prototyping kit. Nonetheless, I am figuring out how a voltage measurement can be converted from analog to digital, after which some calculations are performed for a reference voltage. This reference voltage has to be compared to the voltage that has initially been converted from analog to digital. Therefore, I am looking into ADC and VDAC, but with the scaling in mind, I am quite sure that I can find a solution that will work for me.
Again, many thanks!