1 Reply Latest reply on Feb 21, 2019 2:23 AM by PradiptaB_11

    CY2304SXI

    kaquc_2151576

      Hi Cypress,

       

      We used CY7B991V-5JXI before, the aurora eye open, everything worked fine, but CY7B991V-5JXI doesn’t support TTL input, so we changed to CY2304SXI-2 because it supports TTL input, but the aurora eye close, everything else worked fine. so base on the datasheet, CY2304SXI-2 has more jitters than CY2304SXI-1, so we changed to CY2304SXI-1, the aurora eye still close, everything else worked fine. we measured the pin 7 of CY2304SXI-1, the VDD got some ripples, we don’t know if it is the ripples cause the aurora eye close, so could you guys provide the requirement implementation for the CY2304SXI-1? Especially, how should we implement the power filter for the VDD of CY2304SXI-1?

       

       

      Aurora Eye

      Other functions

      Input support

      CY7B991V-5JX

      Open

      Work

      LVTTL

      CY2304SXI-2

      Close

      Work

      TTL

      CY2304SXI-1

      Close

      Work

      TTL

        • 1. Re: CY2304SXI
          PradiptaB_11

          Hi,

           

          The PLL outputs are affected in both amplitude and phase offset if there is any noise in the power supply. That can be the reason you are not seeing a satisfactory eye diagram. Usually ferrite beads are used for power supply filtering. Can you try placing  a ferrite bead that suits your specifications and check if the issue persist.

           

          Thanks,

          Pradipta.