4 Replies Latest reply on Mar 5, 2019 10:00 PM by abhinavg_21

    FX3 partial flag throughput slave fifo




      This question has two parts: partial flag and throughput, they seem strangely interlinked.


      I am using the example project 'slfifosync' located in: C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\slavefifo_examples\.

      I want to implement a FPGA -> FX3 -> PC link, such that data generated on the FPGA is sent through to the PC, therefore I used this example project as a start. My current implementation:


      FPGA: the FPGA writes 1024 Bytes of data (512 x 16bit transfers, on the last word which I transfer I assert nPKEND. PCLK is 50MHz.

      The FPGA FSM waits for flag A (the full flag) before starting to write to the FX3. It then writes the 1KB of data, whilst monitoring flag B (the partial flag blue). After completing the first 1KB write, it starts over, and does this until it reads an asserted flag B.

      On the oscilloscope, I see that the partial flag (blue) does not assert, whereas the the full flag (flag A, green), does assert. Naturally this results in buffers being overwritten. See image 1:

      Image 1:



      FX3: the FX3 is setup to auto DMA with the following config,

          dmaCfg_auto.size  = burst_len*size;//16*1024;

          dmaCfg_auto.count = 8;

          dmaCfg_auto.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;

          dmaCfg_auto.consSckId = CY_FX_CONSUMER_USB_SOCKET;

          dmaCfg_auto.dmaMode = CY_U3P_DMA_MODE_BYTE;


      CyU3PDmaChannelSetXfer (&glChHandleSlFifoPtoU,0);//0 is for infinite transfer size


          epCfg.enable = CyTrue;

          epCfg.epType = CY_U3P_USB_EP_BULK;

          epCfg.burstLen = burst_len;//where burst_len = 16 when USB 3

          epCfg.streams = 0;

          epCfg.pcktSize = size;//where size = 1024 when USB 3


      and in cyfxslfifousbdscr.c:


          /* Endpoint descriptor for consumer EP */








          /* Super speed endpoint companion descriptor for consumer EP */



          16 - 1,//i.e. burst_len -1 




      Here is the kicker: when I change

      dmaCfg_auto.size  = burst_len*size;//16*1024;


      dmaCfg_auto.size  = size;//1024

      the partial flag is toggled as expected. Furthermore, the throughput increases from 17600KBps to 89500KBps, measured using Cypress’ C++streamer app. (Packets per TX: 8, Xfers to Queue: 64), see image 2:



      Image 2:




      I would assume increasing dmaCfg_auto.size would increase the throughput as various posts have made clear, however, as I have explained, the opposite is true.

      Although 87MBps is not bad throughput, I know a faster throughput is possible.


      What am I doing wrong? Please help.



      I also attached the full FX3 project.