1 Reply Latest reply on Feb 15, 2019 1:48 AM by abhinavg_21

    FX3 to APB mapped peripheral IP on FPGA

    brsmc_4044241

      I am working on a simple design that exposes the registers of an APB mapped peripheral located in a companion FPGA to FX3.  My first instinct was to reconfigure the GPIF interface to generate native APB master to the FPGA.  It seems like this would be a fairly common application, since many peripherals are available as AMBA compliant IPs.  However, I can't seem to find any information or reference designs that do something similar.  Is this problem already solved, or do I need to create some custom glue logic to connect the GPIF to an APB bus?