9 Replies Latest reply on Feb 21, 2019 10:37 AM by MeSh_3749161

    Leakage current in PSoC 6 GPIO pin


      Hi everyone!

      In the following schematic, the red LED is supposed to turn on when the charger IC is charging the Battery, by the open-drain output CHRG pin on charger IC. However, when the charger IC is not charging, the red LED is dimly on with about 300uA current on it, which we guess it is because of leaking current from PSoC 6 GPIO pin.
      What is your thoughts guys? Is this a leakage on GPIO, or it can be something else? How can we fix this issue ?
      PSoC 6 Leakage.jpg

        • 1. Re: Leakage current in PSoC 6 GPIO pin

          1; You may try to disconnect the PSoC6 (B6)from the system to judge whether the current is caused by PSoC6.

          2; The second step to disconnect the charger IC ( CHRG pin ) from the system.

          3; You may add the MOSFET Specification type to let us to analysis the schematic.

          • 2. Re: Leakage current in PSoC 6 GPIO pin

            Thanks for your response.
            By disconnecting the path to PSoC, the dim LED turns off, while disconnecting the path to CHRG, doesn't change anything on the dim LED. The MOSFET part number is SSM3K37FS,LF

            • 3. Re: Leakage current in PSoC 6 GPIO pin

              1; Could you double check you show us the correct schematic about the MOSFET part?

              2; SSM3K37FS----> NMOS, if Vgs<Vt, Id=0, so  I think you should analysis the MOSFET, not PSoC.

              3; When the SW is in off status, what's the real voltage values of MOSFET pins?

              4; What's the function of the B6 pin?

              5; Even though the PSoC has the leakage current, it also can't let the MOSFET has the Id current.

              • 4. Re: Leakage current in PSoC 6 GPIO pin

                The mosfet part is correct; it is a n-channel mosfet. However, the symbol used in the shematic is a bit unclear. The drain in on the top and the source is on the bottom.
                When the switch is off, the voltage on gate is 4.2V, the voltage on source and drain are the same; it is 1.85V.
                The function of B6 is when the MCU is on, we can read the status of CHRG of charger IC.
                I'm not sure if I understood you 5th point, but the Mosfet in the circuit is just like a short, because the gate is 4.2V.
                I also removed the 56K and the 20K, however, nothing changed, still it seems we have current leakage on the PSoC pin.

                • 5. Re: Leakage current in PSoC 6 GPIO pin



                  I) This should be caused by the clamping diodes on the GPIO pin, as you are not supplying the VDDIO power domain.

                  Each GPIO has diodes connected to VDDx and VSSx (power rail depends on the port) that should prevent damage from ESD and certain amount of overvoltage. As VDDIO is OFF it should be at 0V, most likely it is higher, as it is charged through that diode.


                  II) Other question, in the On state what voltage is supplied to VDDIO? I am asking because in that circuit the GPIO will be driven with too high voltage (> VDDIO+0.5V). I haven't found any constellation where this criteria will be met. Shouldn't the 20k resistor be a pull-down to GND to form a voltage divider to 3.3V?

                  I am a bit concerned about the 4.2V here as the PSoC 6 is a 3.3V device.



                  III) If you are using the battery backup domain in your design, it would be best to connect the CHRG signal to Port0 as this port will be still powered.


                  Otherwise I would add a single AND gate in front of the pin and use VDDIO at the second input, so it works like an Enable signal. if VDDIO isn't powered, the pin won't be driven. AND gate is powered by VBATT.




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                  • 6. Re: Leakage current in PSoC 6 GPIO pin

                    Thanks AchimE_41 for your response.

                    i) You are right about VDDIO not being 0V; it is 1.45V when system is switched off. However, as I connected GND to the GPIO --P11.4-- just for test, VDDIO gets 0.55V, but not 0V. Having voltage on VDDIO when the MCU is supposed to be off, is not acceptable, but, I couldn't find the reason yet.


                    ii) Our VDDIO when the switch is ON, is supplied by 2.2V from a voltage converter. You're right about the GPIOs not getting more than 0.5V from VDDIO; however, it is also mentioned that the maximum current rating is 100uA -- with 56K resistor the current would be around 65uA. I concede that putting 56k resistor is not a great idea, however, it can satisfy the condition.


                    iii) One of limitation of our system is to have only charger IC connected to battery when switch is OFF; we cannot apply battery ti anything but the charger. However, your suggestion is interesting and can give ideas on how to avoid connecting V-BATT to GPIOs in our design. 


                    • 7. Re: Leakage current in PSoC 6 GPIO pin

                      Hi Meysam´╝î


                      Have you find the source reason of the VDDIO not equal to zero, when PSoC6 power off?

                      • 8. Re: Leakage current in PSoC 6 GPIO pin

                        Actually, today I realized that the source of 1.5V on VDDIO is the leakage of GPIO connect the LED. I connected GND to that GPIO and VDDIO became 0V.

                        • 9. Re: Leakage current in PSoC 6 GPIO pin

                          In conclusion, I realized that, when the system is OFF,  we should not put any voltage on MCU pin, more than 0.5V. Not only it will rasie the VDDIO, but even if the current goes more than 100uA, the MCU may be burnt. In fact, it seems we can't do anything for the leakage; we must avoid the situations causing it.