Upon further investigating I found it will route if I unlock V_hi or Vlow. Unlocking VTherm pin fails to build. Hope this helps.
I can unlock both V_hi and Vlow and it builds. If I unlock VTherm it fails to build!
Any clues why?
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In special condition, when single analog pin is connected to multiple AMUX differential inputs (like VTherm), Creator analog routing algorithm may have difficult when calculating analog routing solution. For this example, VTherm is used as positive input and negative input in two different differential pairs, so this pin should be able to connect to both Pos and Neg terminal of ADC internally, this limits VTherm pin must be assigned to pins which can connect to analog route AGL, AGL, AGL or AGL internally (below is the analog switch resource of ADC part).
So if you try any of below actions, the project can pass building.
1. Lock VTherm pin and assign it to any pin which can be connected to AGL, AGL, AGL or AGL through analog switch, like P6/P2 can be connected to AGL through close dedicate analog switch.
2. Unlock VTherm pin, drag a 'Net Constraint' component in topdesign, connected it to VTherm trace and force this trace assign to AGL, AGL, AGL or AGL.
3. Switch the connection order of VTherm and Vlow in differential pairs #1, only connect VTherm to pos terminal, then project can pass building too.
Thanks for the very useful reply. You can mark this as solved.