If you turn synthesis optimization off, your design may just be using too many routing resources in the UDB array to route.
Generally you should not turn off synthesis optimization. Your design will run slower, be harder to debug and use more resources if you turn off the optimization. So let me ask, what were you trying to do in turning this off?
Ah, you turned digital logic synthesis off. (Meaning the wires and hardware logic your components are implemented using, not the code.) That will not make your code any easier to debug. It will cause timing issues and routing failures.
You want to turn code optimization off.
The standard debug settings are pretty good for that, but if you want to change it, right click on your project in the Workspace Explorer and select Build Settings.
Click on your compiler (for me ARM GCC) and expand it.
Expand the Compiler item
Click on Optimization and change the level to whatever you want.