2 Replies Latest reply on Jan 14, 2019 4:28 AM by user_247090680

    Reasonable "Alternate Active" mode current with UART wake

    user_247090680

      Hi,

       

      I'd like some pointers and ideas on how to achieve a sub 1mA "standby" current-draw alternate active mode.

      Need to keep UART running / able to wake up on UART RX + SPI Slave select.

       

      PSoC 5LP, CY8C5888FNI-LP214

       

       

      Using CyPmAltAct(PM_ALT_ACT_TIME_NONE, PM_ALT_ACT_SRC_PICU), the idle current is still over 5mA.
      that said, in the datasheet (6.2.1.2) it reads

      • One possible configuration is to turn off the CPU and flash, and run peripherals at full speed.

       

      Assuming that doesn't happen automatically, I checked PM_STBY_CFG0...13 but not sure how to best configure the system so that uart keeps running but the cpu & flash halts to reach a sub 1mA current draw.

       

       

      Thx David

        • 1. Re: Reasonable "Alternate Active" mode current with UART wake
          vsrs

          Hello David,

           

          Is debug interface is running in your system? Please check CYDWR -> Debug select option and make sure whether this option is set to GPIO.

           

          One more thing is to add is that even though you call CyPmAltAct API with PM_ALT_ACT_SRC_PICU as the wake up source, for PSoC5LP device wakeupSource argument is ignored and any of the available wakeup sources will wake the device. You can also make sure whether any other wakeup source is causing your device to go to active mode.

          Best Regards,

          VRS

          • 2. Re: Reasonable "Alternate Active" mode current with UART wake
            user_247090680

            Hi Vrs,

             

            - I've tried to turn off SWD to GPIO, no difference in power-consumption.

             

            - Quite sure that it's stopped in CyPmAltAct as halting the target will take you to that line. I have a 1khz timer that running that wakes it up, so it's easy to see the difference when the code runs in that interrupt vs in-between the timer.

             

            Questions:

             

            1. What is the expected power-draw in Alt-mode, CPU/Flash stopped, but with UART active running.

             

            2. How can we ensure that the CPU is actually stopped when calling CyPmAltAct? As far as we can see, defaults in the PM_STBY_CFG should "stop" the cpu, correct!?

             

            3. Are there some alternatives (i.e. utilizing UDB's) to be able to wake from "real sleep" on UART RX, still making sure the first data-packet is captured.

             

             

             

            FYI:

            We see about 9mA @ 4V, cpu clock is set to 24MHz. This is obviously too high.

            Using the PSoC 3/5 Power Estimator Spreadsheet, I've enabled 24Mhz CPU & UART 1MHz, the calculator gives me 1.5mA

            note: changing 'Power Mode' from Active to AltAct does not affect the resulting current (maybe this select-option doesn't apply in the spreadsheet?)