1 Reply Latest reply on Jan 9, 2019 10:45 PM by PradiptaB_11

    CY7C1021DV33-10ZSXI  - Write cycle query



      We are using 1Mb ASYNC SRAM  CY7C1021DV33-10ZSXI in our new design.

      The datasheet of this device mentioned 3 modes of write cycle on page - 9 and 10. These modes are -

      1) Write Cycle No. 1 (CE Controlled)

      2) Write Cycle No. 2 (BLE or BHE Controlled)

      3) Write Cycle No. 3 (WE Controlled, OE LOW)


      The datasheet of  2Mb part CY7C1011DV33 of this series has mentioned one extra mode i.e. - Write Cycle No. 3 (WE Controlled, OE HIGH During Write)


      We want to use this "Write Cycle No. 3 (WE Controlled, OE HIGH During Write)" mode for writing the data in SRAM as there will be a continuous write in our application. so, we want to make OE# high for entire write duration.


      so, please confirm that, is this  "WE Controlled, OE HIGH During Write" write cycle mode also applicable for 1Mb SRAM part - CY7C1021DV33-10ZSXI


      for ref, i am attaching the WE Controlled, OE HIGH During Write" write cycle mode snapshot mentioned in 2Mb part.


      Thanks and Regards

      Tarang JIndal

        • 1. Re: CY7C1021DV33-10ZSXI  - Write cycle query

          Hi Tarang,


          Yes, you can use WE# low and OE# high for write cycle in 1Mb part also, infact in all density parts.

          The purpose of providing an OE# low and WE# Low waveform for write cycle was to highlight the fact that even if the user disables the output (by driving OE# high) the write is still going to happen in the memory. It only signifies that WE# pin needs to be low for a write to happen irrespective of the status of OE#. You can check this in the truth table also provided in the datasheet.


          Thanks and Regards,