For this case, the program error happened (SR1 P_ERR=1) during the QPP command, so it may possible from the following reasons:
• Programmed protected area:
Although they provided some bit fields value of SR1, there is no BP(Block Protection) related fields values in the snapshot, better provide entire value of SR1 when issue happening.
• QUAD mode configuration:
Please check about the QUAD mode configuration in CR1
• Clock speed and SPI mode:
The SCK clock speed for QPP is different with clock of RDSR1 and WREN, why? The max speed of QPP is 80MHz. What’s the SPI mode they are using now? Our flash only support Mode 0 and 3.
Hi, Thank you so much for your reply! (Sorry for my late reply because I just came back from a business travel)
The answers are as follows:
1,Programmed protected area:Although they provided some bit fields value of SR1, there is no BP(Block Protection) related fields values in the snapshot, better provide entire value of SR1 when issue happening.
------> I didn't set the BP0-BP2 bit, because I just don't need the BP function this time, so when the issue happened or not , the SR1 BP0-BP2 bits are 0
2, QUAD mode configuration:Please check about the QUAD mode configuration in CR1
------>Before the WRR QPP command, I do the WRR command and write the SR1[00H] and CR1[86H] to set the CR1(Latency Code=10 and QUAD = 1), so I think the QUAD mode is correct.
3,Clock speed and SPI mode:The SCK clock speed for QPP is different with clock of RDSR1 and WREN, why? The max speed of QPP is 80MHz. What’s the SPI mode they are using now? Our flash only support Mode 0 and 3.
------> About the different SCK speeds, I thought the RDSR1 and WREN can be executed at the 100MHz, so the command of RDSR1 run at 100MHz and the QPP run at 50MHz ( to decline the whole operation time).
About the SPI mode , when the chip is in standby mode and not doing any operation, the SCK will stay at logic high(I think it is Mode 3)
Besides the discussion, the most strange thing is there are six times of the same QPP operations, but only at the 2nd and 3rd time the error happened.
the six times of address and write data are as followes:
1, FL_ADDRESS_tmp <= X"000000";
FL_WDAT_tmp <= X"12341122";
2, FL_ADDRESS_tmp <= X"000004";
FL_WDAT_tmp <= X"23451122";
3, FL_ADDRESS_tmp <= X"00000C";
FL_WDAT_tmp <= X"34561122";
4, FL_ADDRESS_tmp <= X"0048D0";
FL_WDAT_tmp <= X"45671122";
5, FL_ADDRESS_tmp <= X"0159E0";
FL_WDAT_tmp <= X"56781122";
6, FL_ADDRESS_tmp <= X"01E268";
FL_WDAT_tmp <= X"67891122";
I can't figure out why this phenomenon happened...
Could you help me with that?
Thank you so much and looking forward to your reply~~
Hi, I did some more test just now, and I found that the errors may be related with the program address.
1, every time I do the QPP command, there are 4 bytes(32bits) data writen into the chip
2, Though I write 32bits every time, but I still want to write these all data into the flash in sequence ( there are no spaces between the flash data )
For example, when the first QPP address is "000000" and the first QPP command is executed correctly, if the second QPP address is "000100", then the QPP command will fail, but if the second QPP address is "000104", the QPP command will be done correctly.
But I check it in the datasheet and the datasheet 9.5.3 quad page program, it says"It is possible to program from one bit up to a page size in
each Page programming operation.", so I don't think my operations are wrong...
From this phenomenon, could you help to give me some advice?
Are you using Cypress Verilog model? If so, which version?
Cypress latest version is at:
In this version V1.24, there is some reversion history mention about the QPP command:
The reason that the QPP should not program less than 1 page (16-byte) is because we have the ECC unit for every 16bytes, each unit have the ECC syndrome and ECC enable bit, program multiple time (even with different address) within the same page without erase operation will disable the internal ECC.
For more information about the internal ECC in FL-S series, please refer the following AN:
Thank you so much for your reply!
I checked the version of my simulation model(I am using the s25fl128s.vhd), I found that I downloaded the model at 2018/10/12, the version is
And I downloaded the latest simulation model from your link, it is V1.16, which added the QPP command part.
(I just didn't expect that the versions have been updated so fast :)
And I think I know why this error happened.
Besides, there is one more question that I want to confirm.
If I want to do the operation of programming 32 bits data everytime at the continuous address, I think I should use the PP command instead of the QPP command, is my understanding correct?
Thank you very much for your help! That really helps a lot!
And I am looking forward to your reply about my last question.
QPP and PP can both use for data programming, the difference is only transferred through single or quad lines. For your application to program 32bit every time, there is not much performance improvement by using QPP than PP, QPP will have better performance for large size data programming.