10 Replies Latest reply on Dec 28, 2018 12:18 AM by MeenakshiR_71

    CapSense initialization fails


      I am using PSoC 62 on a custom board and CapSense SmartSense HW params only and when the function CapSense_SsAutoTune() is called during init, it returns error CY_RET_BAD_DATA.  Does anyone know why this happens?

        • 1. Re: CapSense initialization fails

          What is the "CapSense_SsAutoTune()"? Possible to post your simplified project here for reviewing by other community users?

          • 2. Re: CapSense initialization fails

            It is the code generated by PSoC Creator:


            cy_status CapSense_1_Start(void)


                cy_status result;



                /* Initialize CapSense_1 modules */

                result = CapSense_1_Initialize();



                #if (CapSense_1_CSD_AUTOTUNE != CapSense_1_CSD_SS_DIS)

                    if (CY_RET_SUCCESS == result)


                        result = CapSense_1_SsAutoTune();


                #endif /* #if (CapSense_1_CSD_AUTOTUNE != CapSense_1_CSD_SS_DIS) */


            I am setting VDDA to 3.3V but VDDIO1 is 1.8V.  The capsense CMOD and widget pins are on VDDIO1 pins.  Is this a problem?

            • 3. Re: CapSense initialization fails

              Yes, VDDIO1 should be set to VDDA for proper operation. The reason is you have selected VDDA to be 3.3 V - this selects VREF as 2.13 V (refer to CapSense component datasheet). Since CMOD VDDIO is 1.8 V, CMOD will never reach 2.13 V reference (which is required for proper CapSense operation).


              As a result of the above, SmartSense will not be able to tune the sensors and will always fail SsAutoTune() as seen by you. Please either set VDDA to 1.8 V or use 3.3 V for VDDIO1 too. It is recommended to use VDDIO1 (or CapSense/CMOD VDDIO) to be >= VDDA for proper CapSense operation (refer to SID7A of Datasheet).



              Meenakshi Sundaram R

              • 4. Re: CapSense initialization fails

                Your statement that VDDIO1 must be >= VDDA is also in the PSoC 6 datasheet but in PSoC Creator it says VDDA must be >= VDDIO1.  When I try to set VDDA >= VDDIO1 it says:

                Input voltage error: The input voltage of "VDDIO1" is set to 3.6 which is out of range. This pin's value must be between 1.7 and VDDA (3.3).


                Which is correct, the datasheet or PSoC Creator?  If PSoC Creator is wrong, how do I bypass this error so I can finish building my project?

                • 5. Re: CapSense initialization fails

                  Technically speaking, Datasheet is correct as there is no limitation imposed on VDDIO1 w.r.t VDDA for general use and when using CSD method, we need the IO levels of CMOD pin (which is on VDDIO1) to reach VREF (which is linked to VDDA for improving noise performance when we have room). So, the statement VDDIO1 >= VDDA is valid and not VDDIO1 <= VDDA.


                  I will anyway check internally with our Creator team and see how the condition came in and update  the post.

                  • 6. Re: CapSense initialization fails

                    Missed the last part of your question - to bypass this error, simply set VDDIO1 to 3.3 V or VDDA's value This value is not used anywhere in the code.

                    • 7. Re: CapSense initialization fails

                      It seems none of the VDD and VBACKUP values are used in the source code

                      except for VDDA.  Can you confirm this is correct?  I am planning to set

                      everything to 1.8V but in hardware VDDIO0 and VDDUSB is connected to 3.3V.

                      Is there any problem with this?

                      • 8. Re: CapSense initialization fails

                        No, this is perfectly fine. And yeah as far as I know, VDDA is what is used mostly by component or PSoC Creator code for PSoC 6 devices. The other macros are available for user application based choices.


                        Just a note on VDDIO0 - if in future you plan to use eFuse, then provide a provision where you can set VDDIO0 to 2.5 V (+/- 5%) for proper eFuse write/blow operation.



                        Meenakshi Sundaram R

                        • 9. Re: CapSense initialization fails

                          If I set VDDIO0 to 3.3V, can I still program eFuse or do I need to lower it to 2.5V?

                          • 10. Re: CapSense initialization fails

                            You need 2.5 V +/- 5% to reliably program the eFuse bit. This is a hard requirement and is that way to ensure blowing eFuse happens in a more controlled way. Though you may be able to blow the eFuse at 3.3 V, it is not guaranteed to always work i.e. across silicon/temperature.


                            Refer to SID7E in the device datasheet for the spec.



                            Meenakshi Sundaram R