5 Replies Latest reply on Jan 17, 2019 10:56 PM by KandlaguntaR_36

    DMA deadlock in AN75779 USB Video Class (UVC) Framework

    PoHa_290941

      I have problems with the stability of my application based on AN75779. When the video stream is restarted, a rare time (1/2500) occurs a DMA not ready seen from inside the GPIF state machine (! DMA_RDY_TH0). If you call: "CyU3PDmaChannelGetStatus"

      • State: CY_U3P_DMA_ACTIVE
      • prodXferCount: 16360
      • consXferCount: 16360

      This indicate that the first commit is “accepted” by the DMA.

      In an attempt to solve the problem, I have changed the following:

      • Change Dual-DMA to single-DMA.
      • Change the video header from been added by the Fx3 to be added by the FPGA.
      • Change Manual-commit to Automatic-commit.

      I have tried to delete the DMA and restore it, but it does not solves the problem.
      I have tried to completely delete the GPIF state machine and restore it, but it does not solves the problem.
      I have tried to completely reset USB end-point and restore it, but it does not help the problem.

      The problem may be in: the "GPIF state machine", the DMA or the USB Endpoint.
      Can anyone help me?

        • 1. Re: DMA deadlock in AN75779 USB Video Class (UVC) Framework
          KandlaguntaR_36

          Hello,

           

          It looks you are seeing this issue when you stop the video streaming application and start it again.

           

          You should follow the following steps when you stop the video:

          1. Disable the GPIF

          2. NAK over the endpoint

          3. Reset and Flush the endpoint pipe - DMA Reset, Flush endpoint

          4. Remove the NAK over the endpoint

          5. Enable the Low Power Entry

           

          This is described in CyFxUvcApplnStop function in AN75779.

          Please share the snippet of stop function of your application and when & where you called this function.

           

          You said that DMA was not ready from inside the GPIF state machine. How did you conclude this?

           

          You can add the following code to check the state in which the GPIF II state machine stuck. This confirms where is the problem in GPIF II state machine.

          uint8_t curState_p;

          CyU3PGpifGetSMState(&curState_p);

          CyU3PDebugPrint (4, "Current status = %d\r\n", curState_p);

          The GPIF II state value can be seen in cyfxgpif2config.h. Check it with the return value of CyU3PGpifGetSMState. For more information, see the FX3 API Guide (FX3APIGuide.pdf) in \Cypress\EZ-USB FX3 SDK\1.3\doc\firmware.

           

           

          Note that when you are using the same GPIF State machine provided in AN75779 and you are configuring the DMA as single instead of MultiChannel, there will be some other issues observed. Becasue the state machine is built considering that there is a Multichannel DMA with Two GPIF producers and one USB consumer.

           

          I recommend you to follow the steps mentioned in CyFxUvcApplnStart and CyFxUvcApplnStop function of AN75779 when you stop and start the application respectively.

           

          Please enable the UART logs for ease of debugging. Note that you should not use Debugprints in the DMACallback functions.

          • 2. Re: DMA deadlock in AN75779 USB Video Class (UVC) Framework
            PoHa_290941

            I have always done as you descript except that I have not re-enabled the “Low Power Entry”.

            I have tried to re-enable the “Low Power Entry”, but it seems to do no difference.

            My GPIF state machine is modified to only use one DMA.

             

            Poul-Erik.
            • 3. Re: DMA deadlock in AN75779 USB Video Class (UVC) Framework
              KandlaguntaR_36

              Edited:

               

              Please share the firmware along with GPIF state machine for review.

              Also let me know how did you confirm that the State Machine is waiting for DMA_RDY_TH0 and then DMA is locked.

               

              You can add the following code to check the state in which the GPIF II state machine stuck. This confirms where is the problem in GPIF II state machine.

              uint8_t curState_p;

              CyU3PGpifGetSMState(&curState_p);

              CyU3PDebugPrint (4, "Current status = %d\r\n", curState_p);

              The GPIF II state value can be seen in cyfxgpif2config.h. Check it with the return value of CyU3PGpifGetSMState. For more information, see the FX3 API Guide (FX3APIGuide.pdf) in \Cypress\EZ-USB FX3 SDK\1.3\doc\firmware.

              • 4. Re: DMA deadlock in AN75779 USB Video Class (UVC) Framework
                PoHa_290941

                When the error ocure, first the GPIF-state machine ends in "ERR_0". This trigger a restart of DMA and GPIF-state machine. This ends with the GPIF-state machine in "ERR_NOT_READY".

                I am able to "restart of DMA and GPIF-state machine" before the DMA deadlock and get the Video up and running.

                 

                Regards Poul-Erik.

                 

                PS: The "DV" signale is "equal" to "LV" in the orginal application note.

                 

                GPIF™II Designer [Cworkspace1091fwFX3headhw_05FX3_GPIFfx3_uvc.png

                • 5. Re: DMA deadlock in AN75779 USB Video Class (UVC) Framework
                  KandlaguntaR_36

                  Please confirm whether the issue is solved.