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Does Pin 1.7 become unavailable for GPIO use(in my case as a Digital High impedance Input), when you use an ADC in the design? Even if, eeference is set as Internal 1024mv in the ADC?
Because I can see. I can not detect a High on P1.7 even if the level is 3.0V.
Solved! Go to Solution.
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Hello Ronnie,
The pin 1.7 in the PSOC4 (CY8C4244LQI-443) also acts the lead to connect bypass capacitor and external reference pin for the SAR. So if you are using Internal Vref bypassed mode, the Pin 1.7 is directly connected to the reference output and you are supposed to connect the bypass capacitor to that lead. In that situation you are not supposed to use the pin for any other purpose. But if you are using the ADC only in internal Vref mode the pins is supposed to work like any other normal pin.
Best Regards,
VRS
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Hello Ronnie,
The pin 1.7 in the PSOC4 (CY8C4244LQI-443) also acts the lead to connect bypass capacitor and external reference pin for the SAR. So if you are using Internal Vref bypassed mode, the Pin 1.7 is directly connected to the reference output and you are supposed to connect the bypass capacitor to that lead. In that situation you are not supposed to use the pin for any other purpose. But if you are using the ADC only in internal Vref mode the pins is supposed to work like any other normal pin.
Best Regards,
VRS