1 Reply Latest reply on Dec 4, 2018 3:53 AM by SananyaM_56

    CY7C65632 design for 4 downstream ports

    anal_2415406

      Hi,


      For an upcoming USb2.0 hub design, we are using CY7C65632 along with USB3320 USB transceiver chip. The design should have 4 ports and we followed the reference design given by cypress. But we have certain queries in the same and it would be great if someone can clarify those for us.

      1. We have shared our schematics of hub section. Kindly confirm if we have missed out something in that
      2. In the reference design, there is a section which involves fuse and a voltage divider section comprising of R19, R20, R21, R22 etc. We have highlighted that section. what is the functionality of that section? is it needed?
      3. There is an i2C EEPROM in design for configuring descriptors. If we remove that from design, it will work with default configuration right?
      4. Is individual /gang mode widely used?
      5. Is the design is EMI/EMC compliant?
      6. Do we need to add any additional circuitry for EMI/EMC compliance? If there is any reference design, please let us know

      usbhub.PNG

        • 1. Re: CY7C65632 design for 4 downstream ports
          SananyaM_56

          Hello,

           

          1. Your schematic looks fine. Please use a capacitor of minimum 120 uF on the VBUS of downstream ports as per USB 2.0 Spec. Please ensure that the Test pin is pulled down to 0 for normal operation and your crystal meets the following requirements-12 MHz ± 0.05 percent, Parallel resonant, fundamental mode, 600-μW minimum drive level.

          2. The section with the fuse and voltage divider is an alternative low cost solution to using power switches to prevent over current condition. Since you are using power switches in your design, it is not necessary.

          3. Yes the external EEPROM will allow you to load a custom configuration, without it the hub will boot up with the default descriptors.

          4. The individual or gang mode can be used based on your power management requirement. For individual mode, overcurrent detection signals will be used for all four ports even though there is a single power enable signal and power switching can be done for individual ports.

          5. We dont have any reports currently but it has been used in other customer designs and since we didnt face any issues, it should be compliant..

          6. Please go through section 4.4 in the following App Note for reducing susceptibility to EMI http://www.cypress.com/file/122726/download

           

          Best Regards,

          Sananya