We are beginning a FX3 design where the FX3 back end interface is an FPGA and the preferred use case is :
- Boot from GPIF II, presumably Sync ADMux.
- After loading of an image, the FX3 changes GPIF configuration to Sync Slave FIFO (the required data interface).
It appears to me that selection of PMODE = F00 (Sync ADMux) must define some amount of the GPIF interface, but it is unclear to me if, after firmware loading, the FX3 can override the GPIF interface definition to Sync Slave FIFO. Is this possible? Or is there a different suggested mechanism for loading the FX3 but operating as a sync slave fifo?
I cannot find this scenario detailed in any app notes. If there is one, please point me to it.
After loading the firmware, the GPIF interface is defined as in your firmware image.