1 Reply Latest reply on Nov 27, 2018 11:08 PM by geon

    low power mode creep and debug select

    PatrickCiccone

      Hello all.

      -- A little background --

      We are having a problem with our product that uses a PSoC 5lp.  Here is a little history of our product.  We have been using the CY8C5267LTI-LP89 in our product for about 2 years.  Since then we have had 5 different board spins.  The latest board spin is drawing too much in low power mode, which I believe to be uncovering some "best practices" we were not following.  Our previous boards were drawing ~200uA in low power mode ( measured input power.  A little high, but not the biggest fish to fry.  Started around 80uA and then crept up to 220uA).  Our current board starts around 600uA and then creeps up to about 2-3mA.  In order to preserve our IP I can not upload a project, or code, but I can provide snippits.

       

      Here is what we do for low power mode ( with respect to the mcu)

      1. Put all components to sleep
      2. CyPmSaveClocks()
      3. CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_PICU | PM_SLEEP_SRC_CTW );

      Then wake up we

      1. CyPmRestoreClocks();
      2. wake up all components

      Most of the GPIO is either analog input or digital out (strong drive)  I did find ~5 pins that were digital high impedance pins.

      Currently the Debug Select is set to SWD + SWV.

       

      I've spent a ton of time debugging this, but here are some key points

      1. I have verified that MCU is infact going to sleep based on the current spike that I see every second ( based on waking up each cycle of the CTW)
      2. I have tried setting those 5 digital pins to analog high z during sleep mode, to no change in power consumption.
      3. I created a blank project and only added 3 pins ( needed to turn off power rails on our board) and tried setting it to sleep.  This dropped down to ~80uA and crept up to ~200uA.  (Debug Select was set to SWD + SWV)
      4. I redid step 3, but set Debug Select to GPIO.  Power draw was at ~80uA and stayed there ( no creeping for 10 minutes)
      5. I was not able to set Debug Select to GPIO in our current project.  That option is not even there.Screen Shot 2018-11-27 at 12.00.49 PM.png

      I'm leaning towards the power creep being related to the Debug Select.  Because of the creep, I can not accurately gauge how much more power this board version is drawing.  So it could be that setting those 5 pins to analog high z did in fact help, but because of the creep I am unable to confirm that. 

       

      --tldr--

      Under what circumstances will GPIO NOT be an option for Debug Select?  The only difference (major difference) I can see is that we have a separate bootloader project and our main project has a bootloadable component. What other steps can I take to set the Debug Select to GPIO?

        • 1. Re: low power mode creep and debug select
          geon
          • Configuring Debug Select to any mode other than GPIO increases the current consumption. Hence, please switch SWD pins to GPIO mode to reduce power consumption.
          • In a bootloadable project, Debug Select is inherited from the referenced bootloader project. Please select GPIO mode in associated bootloader project.
          • User can still 'Debug' a normal project if Debug Select is set to GPIO. Whereas, 'Attach to Running Target' will not work. Because, if the debug interface is disabled, a reset is necessary to access the PSoC device.
          • 'Debug' option is disabled in any Bootloadable project. In a bootloader system, bootloader runs first and loads bootloadable project via software reset. This resets the debugger interface and bootloadable project cannot be run in debugger mode. There are two methods to debug a bootloadable project,

                    (1) Program the bootloadable.hex file and use 'Attach to Running Target'

                    (2) Convert bootloadable project to normal project, debug the normal project and convert back to bootloadable project once debug is completed.