The cyfxgpif2config.h file has been modified to include the check to identify the GPIF II bus width. The below statements identify the IO matrix configuration and modify the GPIF II bus width accordingly at run-time.
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
0x000010A7, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
#else if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT ==1)
0x000010AC, /* 32b data- CY_U3P_PIB_GPIF_BUS_CONFIG */
Hence, the same .h file can be used for both the configuration of FPGA and the slave FIFO interface.
Thank you. Your answer solves the problem.