5 Replies Latest reply on Nov 30, 2018 2:12 AM by aani

    confirm polarity of FV

    343430142_3869541

      The VSYNC of CMOS produce high pulse means a new frame is coming.Then when VSYNC is low and HSYNC is high,the data will be transmit.

      But in the GPIF Designer, if the polarity of FV is high ,when FV is low,it means end of frame.

      Should I set the polarity of FV active low in my designer?