You should follow length matching for the signals (Address, data and control)
The reason being, these devices might operate at 75 or 100MHz (max) and depending on the controller setup times, there might be scenarios where the delay in longest line might case incorrect data sampling during read or incorrect writes.
Even in our internal system designs, we prefer to have length matched tracks.
The Speeds are slow, but its the edges of control and data lines that might result in failures if falsely classified as logic 0 or 1.
Thanks and Regards,
Thanks for the valuable information.
can you suggest us that how much be the length matching tolerance for a 100MHz operation, like should we go with a very tight length matching figures like +/-10 mils or we can have a relexed length matching up to +/-50 mils.
Thanks and Regards
It is hard to quantify the length without knowing the material. But having a trace delay difference of around 100ps between these signals should be OK.
If this is an FR-4 board, perhaps that offers you a lot of margin. Lesser the delay difference, the better.
I hope this helps you address the issue.