6 Replies Latest reply on Nov 26, 2018 10:42 PM by PradiptaB_11

    Question about access control of nvSRAM.




      Is it possible to execute write access and read access with other control signals (OE, WE) while CE signals (nCE 1, CE 2) are always asserted?

      There is no case where CE is always asserted in the AC timing waveform of the data sheet, so it is confirmed.


      MPN is CY14B116N-Z45XI.


      Best Regards,

      Naoaki Morimoto