5 Replies Latest reply on Dec 10, 2018 10:14 PM by NileshB_06

    PCB design considerations for CY7C1069G30-10ZSXI

      We are using four of CY7C1069G30-10ZSXI in parallel to get a 32-bit data bus connected to a FPGA as host.

      - Is it any need for length matching in the pcb layout when using these SRAM's?

      - Are there any PCB design guideline documents for these types of SRAM's available?