3 Replies Latest reply on Jul 16, 2020 7:14 AM by user_4738101

    For S25FL128S, which simulation file should i use in the VHDL development?



      I am using the flash chips of CYPRESS,S25FL128SAGNFI000, but I have a question that i don't understand..


      Now I have completed the VHDL code in my project, and I want to make a simulation of the FLASH part.

      At the cypress.com, I have downloaded the S25FL128S - VERILOG(S25fl128s.zip), and extract the .exe, I got the files.


      At the model directory, there are several files, which contains the testbench_s25fl128s_vhdl.vhd and the s25fl128s.vhd.


      And I just want to make a simple VHDL behavioral simulation of the flash, if the actions right here?

      1, instantiate the s25fl128s.vhd as a FLASH module. (and or the testbench_s25fl128s_vhdl.vhd, Which one is right? and what is the difference of these two? )

      2, connect the flash module to the control module in my project.

      3, begin the simulation, and my project will generate the SCL/CS/.....signals to the flash module, and the flash module will act like the real flash chip.


      Is my understanding right?


      looking forward to your reply and thank you very much.