For S25FL128S, which simulation file should i use in the VHDL development?

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xiaowei_li_3787
Level 4
Level 4

Hi

I am using the flash chips of CYPRESS,S25FL128SAGNFI000, but I have a question that i don't understand..

Now I have completed the VHDL code in my project, and I want to make a simulation of the FLASH part.

At the cypress.com, I have downloaded the S25FL128S - VERILOG(S25fl128s.zip), and extract the .exe, I got the files.

At the model directory, there are several files, which contains the testbench_s25fl128s_vhdl.vhd and the s25fl128s.vhd.

And I just want to make a simple VHDL behavioral simulation of the flash, if the actions right here?

1, instantiate the s25fl128s.vhd as a FLASH module. (and or the testbench_s25fl128s_vhdl.vhd, Which one is right? and what is the difference of these two? )

2, connect the flash module to the control module in my project.

3, begin the simulation, and my project will generate the SCL/CS/.....signals to the flash module, and the flash module will act like the real flash chip.

Is my understanding right?

looking forward to your reply and thank you very much.

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1 Solution

Hello Xiaowei,

Please find attached the response from the Device Modeling Team :

**************************************************************************************************************************************************

The end customer should refer to the Model_Manual which is part of the zip file. That has instructions on how to use the models.

To answer the question – The customer needs to use the s25fl128s.vhd as a FLASH module. The “testbench_s25fl128s_vhdl.vhd”

is the stimulus generator for the FLASH module and is provided in case they want to use our testbench and test case to see how

model works. 

Best Regards,

-Avi

*************************************************************************************************************************************************

Hope this helps...

Best regards,

Albert

Cypress Semiconductor

View solution in original post

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3 Replies
AlbertB_56
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 replies posted

Hello Xiaowei.Li_3787351,

I have contacted Cypress' Device Modeling Team for further guidance and clarification in regards to your S25FL128S VHDL inquiry .

I will communicate any new information to you as soon as it becomes available.

Best regards,

Albert

Cypress Semiconductor

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Hello Xiaowei,

Please find attached the response from the Device Modeling Team :

**************************************************************************************************************************************************

The end customer should refer to the Model_Manual which is part of the zip file. That has instructions on how to use the models.

To answer the question – The customer needs to use the s25fl128s.vhd as a FLASH module. The “testbench_s25fl128s_vhdl.vhd”

is the stimulus generator for the FLASH module and is provided in case they want to use our testbench and test case to see how

model works. 

Best Regards,

-Avi

*************************************************************************************************************************************************

Hope this helps...

Best regards,

Albert

Cypress Semiconductor

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The verilog model document refering to that device contains very few information about programming mode.

As far as I know there is also no way to dump the flash content to a file after programming.

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