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Erase cycle is initiated only after CS# goes HIGH. WIP bit also goes HIGH at the same time.
WIP bit goes LOW when the erase operation is completed.
Thanks ans Regards,
Hi, thanks for your help.
According to what you said, if I can understand like this:
After the erase instruction sent to the chip, and the CS# goes high,(the WIP goes high too).
then i can monitor the SR1's WIP bit from the CS# goes high, and when the WIP is 0, it means the erase operation is completed.
Is the understanding right ?
And there is another question,
at the program commands, first the CS# goes low, and then we send the instruction to the chip , then the address, then the data, and at last set the CS# high .
at these operations, when the WIP goes high(hasn't complete the operation) and when the WIP goes low(complete the operation)?
looking forward for your reply.Thanks..
Your understanding about WIP bit during erase operation is correct.
Regarding your second query, during program commands the WIP bit goes HIGH after CS# is made HIGH.
Any command execution begins only after CS# goes HIGH. So once the CS# is made HIGH, the WIP bit also goes HIGH indicating programming in progress. When the programming is complete, WIP bit goes LOW.
Thanks and Regards,
Thank you so much for your answer.
It really helps a lot ...