3 Replies Latest reply on Apr 3, 2015 10:57 AM by MichaelF_56

    BCM20736SIP SPI and internal I2C EEPROM


      Here is our desired configuration on a BCM20736SIP:

      1. boot from internal I2C EEPROM

      2. leverage the NVRAM functionality of the internal I2C EEPROM

      3. use SPI1 as a master

      4. use SPI2 as a slave


      Is this possible to do all this at the same time? There are quite some threads stating that on a SoC this doesn't work. But we are not sure if the SIP has similar restrictions. especially since SCL and SDA share the CLK and MOSI  on pins 15 and 16.