[BCM20636S] WP control of internal EEPROM and 10k pull-up on P1

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
StBa_721356
Level 5
Level 5
50 likes received 25 likes received 10 likes received

We are a little confused about the need of the external 10k pull-up on P1 mentioned in the BCM20736S Technical Reference Manual.

The WP input of the internal EEPROM is active high. So with an external 10k pull-up the EEPROM is write-protected by default.

But the default P1 GPIO configuration used in all sample Apps is OUTPUT/LOW. So when the device is up-n-running the external 10k pull-up fights against the low signal on P1 and thus introduces a current leak.

In our design we always want to drive WP low for being able to write to the NVRAM without changing the state of P1. So IMHO it would make more sense to either use a 10k pull-down on P1 or to leave P1 floating.

Why would we  need an external 10k pull-up at all?

What side-effects would be introduced if we would not use the external 10k pull-up?

Would it be OK to use a 10k pull-down instead of a 10k pull-up?

0 Likes
1 Solution
MichaelF_56
Moderator
Moderator
Moderator
250 sign-ins 25 comments on blog 10 comments on blog

The manufacture (while working with one of our larger customers) of the module found that in some use cases that the 10K resistor was required externally to prevent errors during boot.  Because we could not pin point all the use cases where it would be required, we ask that customers provide the external pull-up as a preventative measure.

View solution in original post

0 Likes
3 Replies
MichaelF_56
Moderator
Moderator
Moderator
250 sign-ins 25 comments on blog 10 comments on blog

The manufacture (while working with one of our larger customers) of the module found that in some use cases that the 10K resistor was required externally to prevent errors during boot.  Because we could not pin point all the use cases where it would be required, we ask that customers provide the external pull-up as a preventative measure.

0 Likes

Well,yes, you posted this explanation earlier. But it does not really help deciding what to do. Especially if power consumption is critical.

And to be honest I cannot think of any reason why a WP signal would interfere the boot process - unless the underlying EEPROM behaves erratic if the WP pin is floating. If this is the case then it should not matter if WP is pulled-up or pulled-down.

We would love to use a pull-down rather than a pull-up because this would make more sense in real-life use cases.

0 Likes

Many add the recommended pullup, but many others have left it floating. I am not aware of anyone that is pulling this pin low externally, so this configuration has not been tested.

Maybe others can comment.

0 Likes