Thank you for contacting Cypress Community Forum. NAND allows 1-bit (or 2-bit, or 4-bit or even more, refers to respective NAND device datasheet) error bits per 512 bytes data. NAND also allows <2% bad blocks of the total number of blocks. So NAND file system not only needs ECC handling, but also needs bad block management.
NOR flash has 0 Bit Error Rate and 0 bad block as far as the working condition meet device specification. So NOR flash file system does not need to handle ECC and bad block management.
Again thank you and have a nice day
thank you for your answer Bushra!
The NOR flash devices are undoubtedly more reliable than NAND flash devices.
But I was rather hoping that someone could provide me with actual data to support this fact.
There must be some bit error rate even if it is one bit in a billion.
I would be interesting in the NOR error rate as well. I can tell you for a FACT, it is NOT ZERO. We were duped into believing this and now have a small percentage of customer return boards with usually only 1 unstable bit on them. Sometimes it reads 1, sometimes it reads 0, When repeatedly reading the bits usually they read one way 19/20 times. Reflashing the sector fixes the problem. Its now my belief that ECC is mandatory on both NAND and NOR flash... of course more important for NAND. We had to implement our own ECC in firmware for the 29GL parts.
I bet we have close to 10 NOR chips on hand at this moment with an unstable bit. We probably bought 10k of them or so. 1 in a million, I think not. It happens. The reason we know is that we did a crc32 on the chip before running the product. This will find a bad bit in a hurry. Had we not done this (and believe me, I wish that we had not done it), we would have bad bits and probably never be the wiser of it.