5 Replies Latest reply on Sep 26, 2018 1:49 PM by AchimE_41

    Emulated EEPROM interrupt



      I use the PSOC5lp and the emulatd eeprom module.

      Can in the emulated eeprom module an interrupt be triggered during the blocking function

      EmEEPROM_1_Write() to handle higher priority functions?


      At which Section/Page in the System Reference Guide can I see if the CPU-Clock is reduce during Write and Read of Emulated EEPROM ?


      Thanks for your answers.

        • 1. Re: Emulated EEPROM interrupt

          Hi Max,


          EmEEPROM_Write() is erasing/writting of PSoC5LP internal Flash, which requires non-halt operation. Otherwise, Flash data may be in a unknown status. That is unexpected.

          So during EmEEPROM_Write(), all interrupts should be disabled, in case of causing unknown Flash status.




          • 2. Re: Emulated EEPROM interrupt

            Hi Max,


            While using the emulated EEPROM you are not allowed to execute code from Flash memory. But you could use RAM code during that time. Following might help http://www.cypress.com/comment/262956


            But is there any reason why you are not using the built in 2kB EEPROM, that also allows normal flash execution during write cycles?

            • 3. Re: Emulated EEPROM interrupt



              For my application, it is important to allow a higher prioritized interrupt while writing to the EEPROM to handle other time critical tasks.

              I think that's a typical scenario as you can not miss events up to 20ms (maximum Flash Write Time in PSOC-Datasheet).

              I have build a Test Szenario and have tested this successfully.

              My Design:
              I have 8192 Bytes Emulated EEPROM at a fixed address.

              I write 5 bytes in the emulated EEPROM which takes about 7ms.

              During the write period, an interrupt is triggered every 1 ms to make a print.


              The write and re-read in the EEPROM works without problems while the 1ms interrupt is called for 7 times.

              • 4. Re: Emulated EEPROM interrupt


                in which specification is it stated that during writing to the emulated EEPROM no source code may be executed from the Flash?
                The 2k EEPROM is unfortunately not enough. Requires about 8k EEPROM.


                Thanks for your answers

                • 5. Re: Emulated EEPROM interrupt

                  Hi Max,


                  As the EmEEPROM is using the normal flash, it is stated in the datasheet Memory chapter under Flash:

                  Flash programming is performed through a special interface and preempts code execution out of flash. Code execution may be done out of SRAM during flash programming.

                  For example the PSoC 52xx LP on page 19: http://www.cypress.com/file/45916/download


                  There is a blocking and non-blocking flash write function later has to be used if you want to continue with your interrupts.

                  You also have to remap the Interrupts routines to the RAM .