You should make sure that the chip is programmed with a valid USB 3.0 firmware.
Please load one of the FX3 SDK example project to the I2C EEPROM/SPI FLASH and change the PMODE for I2C/SPI boot mode. Please use FX3 SDK 1.3 or above for building the project.
Before starting the compliance test, make sure that FX3 is enumerating as USB 3.0 device in your PC/Laptop.
You must load USB 3.0 enabled firmware in CYUSB3KIT-001.
For this, you can load USB Bulk Source Sink example firmware.
This will take care asserting the terminations when there is valid VBUS.
Note that the device enters into compliance mode when there is a timeout of tpollingLFPStimeout as per the USB 3.0 Spec (section 126.96.36.199.2).
"An upstream port shall transition to Compliance Mode upon the 360-ms timer timeout
(tPollingLFPSTimeout) and the following two conditions are met:
1. The port has never successfully completed Polling.LFPS after PowerOn Reset.
2. The condition to transition to Polling.RxEQ or Polling.LFPSPlus is not met.
Note: If the very first attempt in Polling.LFPS handshake fails after PowerOn Reset, it
implies that a passive test load may be present and compliance test should be initiated. If
the very first attempt in Polling.LFPS handshake succeeds after PowerOn Reset, it
implies the presence of the Enhanced SuperSpeed ports on each side of the link and no
compliance test is intended. Therefore, any subsequent handshake timeout in
Polling.LFPS when the link is retrained is only an indication of link training failure, not a
signal to enter Compliance Mode."
Thanks for your Reply.
As per your reply, We have programmed with the USB 3.0 firmware.
We have loaded one of the example project to SPI FLASH and changed the PM mode to SPI boot mode device.
After that also we are not able to get the LFPS signal from the device, where USB test fixture is acts a Host.
Please let us know how do we get the LFPS signal.
1)Did you check the USB 3.0 enumeration in the PC?
2)Can you please use the bulksrcsink firmware for your test? The project will be available in your FX3 SDK installation directory : C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\basic_examples\cyfxbulksrcsink
Please collect the UART log when:
i)FX3 is connected to the PC
ii)FX3 is connected to the test fixture
3)The FX3 will not send LFPS signal if it is not detecting the receiver termination. Please check.
4)Can you please attach the photo of your test setup?
Hi Keaj ,
Thank you for your reply..
Now we used the USB3.0 cable for USB3.0 enumeration.
Now we can observe LPFS signal from the USB test fixture.
Thank you for support.
If I need any help further i will let you know.
HI Keaj ,
Thanks for your support.
Still we have some queries on the cypress board with USB test fixture.
How do we generate the LFPS signal for CP0 and CP1 pattern from the board.
Since we can able to observe the LFPS signal from the device, similarly we wanted to generate the LFPS signal for the SSC measurement.
Early waiting your reply.
I hope that you have used USB Bulk Source Sink example firmware for testing and USB 3.0 device enumeration is confirmed by connecting to USB 3.0 PC.
The patterns required to successfully complete USB 3.0 electrical compliance are taken care in the library source code.
Once the device enters into compliance mode, it will respond to the commands received from the host PC/ test setup. Hence, you don't need to any additional things to generate the required patterns.
As per USB3 spec,
- Upon entry to Compliance Mode, the port shall wait until its eSS Tx DC common mode voltage meets the VTX-DC-CM specification defined in Table 6-18 before it starts to send the first compliance test pattern defined in Table 6-13.
- The port shall transmit the next compliance test pattern continuously upon detection of a Ping.LFPS as defined in Section 6.9.1.
FX3 follows the USB3 specification. To change the compliance pattern, the test equipment has to send Ping.LFPS signal on the RX lines of FX3.
You don't have to do anything in your application firmware to change/generate the compliance pattern. It is already handled in the silicon.
Thank you for your reply.
But from your reply, how do we send Ping.LFPS signal on the RX lines of FX3.
Preferably we can use equipment for generating such a signal?
You should use the equipment for generating the Ping.LFPS on RX lines of FX3.
We would like to know which setup you are using and how you have made the connections.
Please share the photo of your setup.
Hi Team ,
Could you please suggest me to proceed further for generating the ping. LPFS signal from the external equipment.
What kind of signal (pingLFPS) will be .please suggest.
You would have test setup (either keysight or lecroy) to generate the pattern required. Just having the test fixture is not enough.
In general, the users do not need to generate the ping LFPS. The setup will take care of this. the users should just make the connections.
Please refer the following test procedure if you are using Keysight equipment - https://www.keysight.com/upload/cmc_upload/All/USB3.0.pdf