Could you confirm the HIB_LPO_SEL is tied to ground and you are not seeing the external 32.768 kHz clk on the crystal pads? The 60us delay is required for the PMU to function properly. Based on your selected RC value in the schematic, it seems that you should be getting that delay but please confirm the LPO_SEL is tied to GND and we can further try to debug this issue.
thanks for your reply.
i confirm HIB_LPO_SEL is tied to ground. I can see that external 32K crystal work normally about 800ms after hib_reg_on_in is high as attached picture.
hib_reg_on_in is power enable pin for CYW43907 module, when hib_reg_on_in is low, the 32K768 crystal doesnot work.
from CYW43907's datasheet,the 32K768 sleep clock should be provided 2 sleep cycles before hib_reg_on_in is high.