- Please let us know what is the PMODE line setting that you are using.
- It is recommended to maintain a minimum reset pulse width of 1ms. Kindly, check if this is satisfied in your condition.
- Please share the schematic of your design around the RESET# pin.
Hello, Srinath S-San
Thank you for reply.
We use PMODE[2:0] line
Z11 USB Boot
0Z1 SPI Boot
set above state with external switch's setting..
At Main power on , No reset pulse is applied
When RESET# and INT# are disconnected, USB boot was possible even without reset pulse with our board.
Pls refer to attached PNG
- Can you please probe the RESET# pin on both the boot modes and share the same?
- Also, let me know if the SPI boot mode works fine all the time.
(1)INT# and RESET# pin Probe result
Approximately 3.5 msec later from power on, the INT # pin outputs a low level signal. This works only in USB boot mode.
In the SPI boot mode power up sequence, the INT # output is never changed.
Therefore, when INT # -RESET # is directly connected, I understand that the RESET # input will be applied at power on, and the USB boot operation will be canceled.
Is it the specification that INT # outputs during USB boot operation?
I was able to see the similar scenario using the Cypress FX3 SuperSpeed Explorer Kit. This is a behavior of the FX3 boot-loader that resides in the internal ROM and hence cannot be modified. So, kindly, modify the hardware to remove the connection of INT# pin to RESET# pin.
Thank you for response.
We will modify hardware connection.