Please check that the entire schematic is not attached.
I understand your concern about the extra current drawn from the VBUS to FPGA via FX3 I/O ports. We had implemented AN 65974 slavefifo application in which FX3 is interfaced with Xilinx FPGA board. We haven't encountered any issue like that. You may go through the schematics of Xilinx FPGA board and FX3 Super Speed Explorer kit to check how it is implemented. I don't think that we are using any buffers.
Thanks & Regards