3 Replies Latest reply on Sep 5, 2018 11:02 PM by Gyan Chand

    CYBLE Deep Sleep power consumption

    adamdai97_3199101

      We are attempting to develop a low-power energy harvesting bluetooth sensing system using the CYBLE 214009-00 module. The system is designed to be powered with fuel cells, whose voltage is boosted with a boost converter chip, and the power is stored in a capacitor, which periodically discharges to intermittently power the BLE module to take measurements from sensors and broadcast them over bluetooth. More specifically, we first fully charge the capacitor (to around 4 V), then operate the BLE chip until the capacitor reaches 2.5 V, at which point we set the chip to go into deep sleep for a certain amount time and let the capacitor charge back up to full in this low power state. In between operation we would like the BLE chip to remain on in deep sleep mode since turning on the chip consumes lots of power and takes away from valuable that could be spent taking measurements, sending bluetooth packets etc. Thus, to find out how much power is required to keep the chip on in deep sleep, we programmed it to run in deep sleep, and powered our system with increasing amounts of power until we saw the capacitor voltage stabilize. We found that 5-6 mA at 0.6 V (3 mW) was required to keep the capacitor voltage constant, which is much more than we expect deep sleep to consume. Granted, there are other components on our board which take power or introduce inefficiency (instrumentation amps, voltage regulator, boost converter), but we still expect the system to run much more efficiently in deep sleep.

       

      In order to more specifically test how much power the CYBLE chip itself was consuming, we ran the same deep sleep code on a CYBLE evaluation board while powering it with 3.3 V, and observed it to consume approximately 1.3 uA (4.3 uW).

       

      In addition, we tried removing the CYBLE chip from the board and powering the remainder of the system with the power supply as before, and 1 mA was sufficient (which is much closer to what we expected to see from the previous test). Thus, we have reason to believe that somehow the connection of the chip to our board is introducing some severe inefficiencies, i.e. some of the chip's GPIOs are sinking current or are set to the wrong drive setting.

       

      I have attached several files for reference:

      DeepSleep.cydsn - PSOC 4 project intended to put the CYBLE chip in deep sleep indefinitely

      wristband_pcb.pdf - PCB layout of the energy harvesting bluetooth sensing system, including the CYBLE chip.

      wristband_schematic.pdf - schematic of above system

      WristbandPCBV1.kicad_pcb - KiCad project included for more details

       

      If anyone has any ideas or suggestions they would be greatly appreciated.

        • 1. Re: CYBLE Deep Sleep power consumption
          Gyan Chand

          Hello,

           

             As you stated " In order to more specifically test how much power the CYBLE chip itself was consuming, we ran the same deep sleep code on a CYBLE evaluation board while powering it with 3.3 V, and observed it to consume approximately 1.3 uA (4.3 uW)."  according to this statement the module is consuming 1.3 uA in DeepSleep Low Power Mode  ( Am I correct? ) which is correct as per the datasheet and there are no issues from the module side.

           

          Please note that the DeepSleep wake up sources , WDT , CTBs , BLESS will wake up the module at every interrupt respectively from DeepSleep and hence the average current consumption will be more than the instantaneous DeepSleep Current Consumption (1.3 uA).

           

          For more details on BLE Low Power implementation please refer the below Application Note.

           

           

          http://www.cypress.com/file/140991/download

           

          -Gyan

           

           

           

           

           

           

          • 2. Re: CYBLE Deep Sleep power consumption
            adamdai97_3199101

            Hi,

             

            Yes, I agree that the chip standalone is working as expected (i.e. consuming 1.3 uA while in deep sleep). However, the issue we are encountering is that once the chip is soldered onto our board, it consumes much more power. We were wondering if you could help us by taking a look at our PCB and schematic as well as the chip's code/configuration to see if there are any possible reasons why this might be happening. For example if unused pins could be sinking current, etc.

             

            Also, to clarify, the code we were running in both instances (chip on board and chip standalone) was the same, and all it is doing is putting the chip into deep sleep. Thus, any deep sleep wakeup sources should not be affecting the power consumption between the two tests whatsoever.

             

            Thanks,

            Adam

            • 3. Re: CYBLE Deep Sleep power consumption
              Gyan Chand

              Hello Adam,

               

                     Are you sure that you are only measuring the current consumed by CYBLE 214009-00 when you solder it on your PCB and it is not affected by other on-board circuitry?

               

              1) Before programming the Module select the Debug setting as 'GPIO'( .CYDWR -> System -> Debug setting -> Select to GPIO) and then program the module.

               

              2) Other GPIO pins you can put in ANALOG_HIZ before putting the device in low power mode to make sure that there would not be any leakage current through these GPIOs.

               

              -Gyan