10 Replies Latest reply on Aug 27, 2018 7:11 PM by 18611823898_3631236

    I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.

    18611823898_3631236

      CY14B101NA is connected to STM32F427 via the FMC bus. Now, I can write/read data to SRAM  or store/recall data to nonvolatile memory by its Power off automatic storage/recall.  But the Software STORE/RECALL method doesn't work. After executing sequential CE or OE controlled read cycles from six specific address locations in exact order, HSB is not driven LOW!So, the data was not stored/recalled to the nonvolatile memory. Is there any sample code to understand Software storing/recalling. So is there any example code I can have a look? Thank you very much!

      I upload my code and the CY14B101NA connection diagram,could you please take a look at it for me?Thank you very much!

        • 1. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
          prbd

          Can you please upload the rar file again. We are not able to access it. The schematics are okay. I hope you are keeping the WE# pin high for all the 6 consecutive read operations also.

           

          Thanks,

          Pradipta.

          1 of 1 people found this helpful
          • 2. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
            18611823898_3631236

            Thanks for getting back to me so fast!I upload the rar file again. The code was written by MDK v5.2. The project path is in:SRAM读写测试\USER\SRAM.uvprojx

            Thanks,

            LiBo

            1 of 1 people found this helpful
            • 3. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
              18611823898_3631236

              The WE# pin was kept high for all the 6 consecutive read operations, but software STORE/RECALL method didn't work still. And I recently have a question about it's autostore method, when the CY14B101LA is powered by the VCAP capacitor, what range of voltages ensures that the memory is working properly?

              Thanks,

              LiBo

              • 4. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                prbd

                Hi,

                 

                The range of voltage will be from 2.7 V to 3.6 V (on the Vcc pin) as specified in the datasheet. As long as this is followed the device will work properly.

                 

                Can you provide us with the scope shots of the software store operation. Please scope the address pin, CE pin, OE pin, HSB pin, DQ pin and the WE pin. As all other functionality is working for the part the scope shots will give us a better idea to debug faster.

                 

                Thanks,

                Pradipta.

                1 of 1 people found this helpful
                • 5. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                  zsk

                  Hi,

                  The Nonvolatile Store operation drives the HSB low when executed successfully. Please make sure you are reading (read with either OE or CE controlled) the address sequence in the following order (only) to trigger the nonvolatile Store. 

                   

                  1- 0x4E38

                  2- 0xB1C7

                  3 - 0x83E0

                  4- 0x7C1F

                  5- 0x703F

                  6- 0x8FC0

                   

                  When the 6th address in the above sequence is latched, the I/Os become tri-state and nvSRAM drives the HSB pin LOW. Any mismatch in the address sequence or (Address controlled read) will be ignored and NV Store will not trigger, thus HSB will not toggle.

                   

                  Other quick check can be writing a know data pattern at the above 6 address locations and read+verify when executing the above 6 address read. (The first 5 reads should return a valid data; the 6th read triggers the NV Store and tri-states the IO, hence will return an invalid data).

                   

                  Regards,

                  Shivendra

                  • 6. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                    18611823898_3631236

                    Hi.

                    I wrote a know data pattern at the 6 address locations and read+verify when executing the 6 address read. The six reads results were all valid data, as the same as the data I was written. Could you give me some othe suggestions?

                    Thanks,

                    LiBo

                    • 7. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                      18611823898_3631236

                      HI,

                          SRAM Write and Read function

                      11.png

                      SRAM software store function

                      22.png

                      SRAM software Recall function

                      33.png

                      The main fuction

                      77.png

                      The scope shots of  the address pin, CE pin, OE pin, HSB pin, DQ pin and the WE pin

                      44.png

                      55.png

                      66.png

                      Thanks,

                      LiBo

                      • 8. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                        18611823898_3631236

                        Hi,

                        It's the program.

                         

                        main.c

                        #include "sys.h"

                        #include "delay.h"

                        #include "usart.h"

                        #include "led.h"

                        #include "key.h"

                        #include "lcd.h"

                        #include "sram.h"

                        int main(void)

                          u32 i=0;

                          u16 dat_w[50];

                          u16 dat_r[50];

                          u16 testflag;

                          HAL_Init();                     //初始化HAL库  

                          Stm32_Clock_Init(360,8,2,8);   //设置时钟,180Mhz

                          delay_init(180);                //初始化延时函数

                          LED_Init();                     //初始化LED

                          SRAM_Init();                      //初始化SRAM

                          testflag=2;

                          LED0 = 0;

                          LED1 = 0;

                          for(i=0; i<50; i++)

                          {

                          dat_w[i] = i<<4;//<<8

                          }

                          FMC_SRAM_WriteBuffer(dat_w, 0x00, 50);

                          FMC_SRAM_ReadBuffer(dat_r, 0x00, 50);

                          //对NVSRAM进行软件存储

                          FMC_SRAM_SOFT_STORE();

                          delay_us(200);

                          for(i=0; i<50; i++)

                          {

                          dat_w[i] = i<<8;//

                          }

                          FMC_SRAM_WriteBuffer(dat_w, 0x00, 50);

                          FMC_SRAM_ReadBuffer(dat_r, 0x00, 50);

                          FMC_SRAM_SOFT_RECALL();

                          delay_us(200);

                          FMC_SRAM_ReadBuffer(dat_r, 0x00, 50);

                        }

                         

                         

                        sram.c

                        #include "sram.h"

                        #include "delay.h"

                        SRAM_HandleTypeDef SRAM_Handler;   //SRAM句柄

                        void SRAM_Init(void)

                        {

                          FMC_NORSRAM_TimingTypeDef SRAM_Timing;

                          SRAM_Handler.Instance = FMC_NORSRAM_DEVICE;

                          SRAM_Handler.Extended=FMC_NORSRAM_EXTENDED_DEVICE;

                          SRAM_Handler.Init.NSBank = FMC_NORSRAM_BANK1;

                          SRAM_Handler.Init.MemoryType =FMC_MEMORY_TYPE_SRAM;

                          SRAM_Handler.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;

                          SRAM_Handler.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;

                          SRAM_Handler.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;

                          SRAM_Handler.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;

                          SRAM_Handler.Init.WrapMode = FMC_WRAP_MODE_DISABLE;

                          SRAM_Handler.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;

                          SRAM_Handler.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;

                          SRAM_Handler.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;

                          SRAM_Handler.Init.ContinuousClock=FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;

                          SRAM_Handler.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;

                          SRAM_Handler.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;

                          SRAM_Handler.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;

                         

                          SRAM_Timing.AddressSetupTime=0x01;        //??????(ADDSET)?1?HCLK 1/180M*1=5.5ns*1=5.5ns

                          SRAM_Timing.AddressHoldTime=0x00;

                          SRAM_Timing.DataSetupTime=0x07;           //??????(DATAST)?7?HCLK =5.5*7=38.5ns

                          SRAM_Timing.DataLatency = 0x00;

                          SRAM_Timing.BusTurnAroundDuration = 0x00;

                          SRAM_Timing.CLKDivision =0x00;

                          SRAM_Timing.AccessMode=FMC_ACCESS_MODE_A; //??A

                          HAL_SRAM_Init(&SRAM_Handler,&SRAM_Timing,&SRAM_Timing);

                        }

                         

                        void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)

                        {

                          GPIO_InitTypeDef GPIO_Initure;

                         

                          __HAL_RCC_FMC_CLK_ENABLE(); //使能FMC时钟

                          __HAL_RCC_GPIOD_CLK_ENABLE(); //使能GPIOD时钟

                          __HAL_RCC_GPIOE_CLK_ENABLE(); //使能GPIOE时钟

                          __HAL_RCC_GPIOF_CLK_ENABLE(); //使能GPIOF时钟

                          __HAL_RCC_GPIOG_CLK_ENABLE(); //使能GPIOG时钟

                         

                          //初始化PD0,1,4,5,7,8,9,10,11,14,15

                          GPIO_Initure.Pin=GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5

                                                     | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10

                          | GPIO_PIN_11 | GPIO_PIN_14 | GPIO_PIN_15;

                          GPIO_Initure.Mode=GPIO_MODE_AF_PP; //????

                          GPIO_Initure.Pull=GPIO_PULLUP; //??

                          GPIO_Initure.Speed=GPIO_SPEED_HIGH; //??

                          GPIO_Initure.Alternate=GPIO_AF12_FMC; //???FMC

                          HAL_GPIO_Init(GPIOD,&GPIO_Initure);     //???

                         

                          //初始化PE7,8,9,10,11,12,13,14,15

                          GPIO_Initure.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|\

                                             GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;

                          GPIO_Initure.Mode=GPIO_MODE_AF_PP; //????

                          GPIO_Initure.Pull=GPIO_PULLUP; //??

                          GPIO_Initure.Speed=GPIO_SPEED_HIGH; //??

                          GPIO_Initure.Alternate=GPIO_AF12_FMC; //???FMC

                          HAL_GPIO_Init(GPIOE,&GPIO_Initure);

                         

                          //初始化PF0,1,2,3,4,5,12,13,14,15

                          GPIO_Initure.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|\

                                             GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;

                          GPIO_Initure.Mode=GPIO_MODE_AF_PP; //????

                          GPIO_Initure.Pull=GPIO_PULLUP; //??

                          GPIO_Initure.Speed=GPIO_SPEED_HIGH; //??

                          GPIO_Initure.Alternate=GPIO_AF12_FMC; //???FMC

                          HAL_GPIO_Init(GPIOF,&GPIO_Initure);

                         

                          //初始化PG0,1,2,3,4,5,6,9

                          GPIO_Initure.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|\

                                               GPIO_PIN_5|GPIO_PIN_9;

                          GPIO_Initure.Mode=GPIO_MODE_AF_PP; //????

                          GPIO_Initure.Pull=GPIO_PULLUP; //??

                          GPIO_Initure.Speed=GPIO_SPEED_HIGH; //??

                          GPIO_Initure.Alternate=GPIO_AF12_FMC; //???FMC

                          HAL_GPIO_Init(GPIOG,&GPIO_Initure);

                         

                        void FMC_SRAM_WriteBuffer(u16 *pBuffer,u32 WriteAddr,u32 n)

                        {

                          for(;n!=0;n--)

                          {

                          *(vu16*)(Bank1_SRAM1_ADDR+WriteAddr)=*pBuffer;

                          WriteAddr+=2;

                          pBuffer++;

                          }

                        }

                         

                        void FMC_SRAM_ReadBuffer(u16 *pBuffer,u32 ReadAddr,u32 n)

                        {

                          for(;n!=0;n--)

                          {

                          *pBuffer=*(vu16*)(Bank1_SRAM1_ADDR+ReadAddr);

                          ReadAddr+=2;

                          pBuffer++;

                          }

                        }

                        void FMC_SRAM_SOFT_STORE(void)

                        {

                          u16 pBuffer[6];

                          u16 dat_a[1]={0x10};

                          u16 dat_b[1];

                          u16 i=0;

                          FMC_SRAM_ReadBuffer(dat_b,0x4E38,1);

                          FMC_SRAM_ReadBuffer(dat_b,0xB1C7,1);

                          FMC_SRAM_ReadBuffer(dat_b,0x83E0,1);

                          FMC_SRAM_ReadBuffer(dat_b,0x7C1F,1);

                          FMC_SRAM_ReadBuffer(dat_b,0x703F,1);

                          FMC_SRAM_ReadBuffer(dat_b,0x8FC0,1);

                        }

                         

                        void FMC_SRAM_SOFT_RECALL(void)

                        {

                          u16*pBuffer;

                          u16 i=0;

                          FMC_SRAM_ReadBuffer(pBuffer,0x4E38,1);

                          FMC_SRAM_ReadBuffer(pBuffer,0xB1C7,1);

                          FMC_SRAM_ReadBuffer(pBuffer,0x83E0,1);

                          FMC_SRAM_ReadBuffer(pBuffer,0x7C1F,1);

                          FMC_SRAM_ReadBuffer(pBuffer,0x703F,1);

                          FMC_SRAM_ReadBuffer(pBuffer,0x4C63,1);

                        }

                         

                         

                        Thanks,

                        LiBo

                        • 9. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                          zsk

                          Hi LiBo,

                          Thanks for sharing the code and schematic details. Schematic and code both look OK. However, I couldn't make out from the above code whether it is a CE, OE or Address controlled read. The software sequence wont work for address controlled reads where read address is applied after CE and OE are driven low first. The correct sequence should be either of the first two shown below:

                           

                          1- OE controlled access - OK sequence

                          1- Set the address

                          2- Toggle CE low

                          3- Toggle OE low

                          4- Toggle OE high

                          5- Toggle CE high

                           

                          2- CE controlled access - OK sequence

                          1- Set the address

                          2- Toggle OE low

                          3- Toggle CE low

                          4- Toggle CE high

                          5- Toggle OE high

                           

                          3- Address controlled access - Not OK sequence

                          3.a)

                          1- Toggle OE low

                          2- Toggle CE low

                          3- Set the address

                          4- Toggle CE high

                          5- Toggle OE high

                          3.b)

                          1- Toggle CE low

                          2- Toggle OE low

                          3- Set the address

                          4- Toggle OE high

                          5- Toggle CE high

                           

                          As you mentioned in response#6 that 6th address read returns a valid data; that indicates soft sequence didn't trigger. You can probe CE, WE and A2 or A3 to determine the read control sequence. Since A2/A3 toggle couple of times during software sequence, probing the above pin would help detecting the validity of read sequence.

                           

                          Another possibility SW sequence not triggering can be due to addresses not reaching to the nvSRAM pins in the same order as initialize in the code. For example,  FMC_SRAM_ReadBuffer(dat_b,0x4E38,1); 4E38 may not be reaching on the nvSRAM pins with the same values. This is possible if the firmware code implements any address scrambling, not shown in the above code though.

                           

                          Thanks,

                          Shivendra

                          1 of 1 people found this helpful
                          • 10. Re: I am using CY14B101NA to store data in the nonvolatile memory by its Software STORE/RECALL method.
                            18611823898_3631236

                            Hi, Shivendra,

                            Thank you very much for your reply.  I found the problem according to your suggestion, The sequence is correct, the address is wrong. When stm32 is connected to 16-bit width memory, then an address can operate on a word (16-bit) of data so that 26 address lines are not required, and HADDR[0] is not used, so: HADDR[25:1] = FMC _A[24:0]. I moved the address of stm32 to the left one, and the Software STORE/RECALL is working properly. Thank you for your advice, sincerely,otherwise I might not be able to find the root of the problem for a long time!

                            Thanks,

                            LiBo

                            1 of 1 people found this helpful