1 Reply Latest reply on Jul 31, 2018 11:30 AM by HeGi_2497906

    SPI corrupt processor to processor

    HeGi_2497906

      Cypress team, I need some advice, I have a 012011 connected to a 4024 via SPI, I have other SPI devices on the same bus and they work fine, no issues.  I get nothing but corrupt data, very inconsistent at best, I have tried every possible scenario (median filters, free running clocks, late MISO, different over sampling and data rates) and nothing makes a difference, please look the data here and advise me if I have missed some thing.  Attached is my project, both master and slave, screen shots of my pin assignments, SPI dialog boxes and schematics, I have to get this working,

       

        • 1. Re: SPI corrupt processor to processor
          HeGi_2497906

          I got it working, but had to jump through many issues, what fixed it was having a dummy READ/WRITE word that is discarded.  That got is solid.  I suspect the fact that the slave is running on the ILO only, is the real culprit.  On the production design we will add a watch crystal and see if that does not improve things.

           

          There were many other ideas to try, cycling the slave SPI on and off between transfers also helped.