2 Replies Latest reply on Jul 26, 2018 1:33 AM by AchimE_41

    PSOC6 SPI master 3-wire bidirectional support




      I like to access a SPI slave with 3-wire SPI implementation on PSOC6.
      The component SPI(SCB v2.0) doesn't seem to have a 3 wire SPI  implementation/sub-mode.

      I do see National Semiconductor (microwire), but this is still 4 wire.

      Any there a way to support this in PSOC6?

      I see that this is supported in other PSOC family.



        • 1. Re: PSOC6 SPI master 3-wire bidirectional support



          Three wire SPI implementations are highly device-specific. If you're connecting to a slave with a 3 wire implementation similar to LM74, this is usually done with with connecting a high value resistor (typically 10kΩ) resistor from MOSI to MISO. Slave's SI/O pin is connected to this node. MISO and MOSI drives are mutually exclusive as you can see from the timing diagram:

          In some cases, you have to use a GPIO as the slave select and implement a custom firmware based timing. Please go through the slave's datasheet and try to match your implementation with its timing diagram.




          • 2. Re: PSOC6 SPI master 3-wire bidirectional support



            Another solution if you use an SPI on Port 8 or 9 would be to use SmartIO and the internal Data Unit to route the data automatically to MOSI and MISO. The Data Unit has to be configured as counter that controls the multiplexing of the data via the LUTs. Chip Select should be used to reset the Data Unit.



            Third solution and most complex would be a custom component using the UDBs. But this is also the most flexible in case the SPI communication has some special timing requirements.


            Kind Regards,