CySysFlashWriteRow(...) while UART TX

[MaPe_1936286]

Good morning,

I am using a CY8CKIT-149 PSoC 4100S Plus Prototyping Kit and I have a problem in UART transmitting with while the Flash is writing a row.

I have attached a simple project. When the UART receive the 'r' char, it transmits the sequence "12345678" and immediately write the last row of the flash with the CySysFlashWriteRow function.

If I connect to the device with a Serial Terminal, when I send the 'r' char I receive a sequence different from "12345678": different chars and different size.

However, if I wait for the end of the transmission of the UART before writing the flash everything works properly.

I do not understand why the UART TX and the Flash write row interfere.

[LinglingG_46 · Accepted solution]

The  API: CySysFlashWriteRow((CY_FLASH_NUMBER_ROWS - 1u), rowData); changes the inner clock.

You can read the source code: CySysFlashClockConfig();

Our creator clarify the API:

It says that the IMO run at 48MHz when you execute the flash.

Now, if you change the IMO to 48Mhz, then run your code, everything will be OK.

[MaPe_1936286]

Thank you for your answer

[MaPe_1936286]

What is the impact using IMO at 48 MHz rather than 24 MHz ? Are there any consequences ?