1 Reply Latest reply on Jul 18, 2018 6:14 AM by vsrs

    DAC gain error

    florin-teodor.ciortea_3582361

      Hello,

       

      I am a rookie concerning DACs and I have a bit of a problem in understanding the PSoC 5LP DAC datasheet.

      One question regarding the PSoC 5LP DAC gain error. I saw it is stated that the device exhibits a +/-5% gain error and I was wondering if this means that the 4.08V full scale range is violated as the device is supplied from 5V or it just means that the output meets the 4.08 limit sooner than expected. 

      Also I observed that the offset error is stated as +/-0.9LSB. In the case of -0.9LSB does it mean that 1 sent on the input is 0 on the output as I presume the output will not go negative (no negative voltage within the chip)?

       

      Thank you for your support,

      Florin

        • 1. Re: DAC gain error
          vsrs

          Hello Florin,

           

          The VDAC current mirror circuits needs minimum voltage across them to stay in saturation region for operation. From this only maximum voltage value arises. So the +/- gain error will result in reaching 4.08 limit sooner/later than expected.

           

          The chip will not support any voltage below VSSA voltage. So output will not go negative.

           

          Best Regards,
          VSRS