4 Replies Latest reply on Jul 16, 2018 5:19 AM by ShipingW_81

    Use of P6[6] and P6[7] for SWD on CY8CKIT-062-BLE Pioneer Board


      I'm trying to build a project that uses the CY8CKIT-062-BLE Pioneer Board with external connections to the headers for ADC, SPI, and UART.  I need 8+ single-ended ADCs and have been advised to set up a the single ADC with a 2 configurations:


      Config 0 has 4 inputs and Config 1 has 8 inputs and these are spread across pins on P7 and P10 but when I try to generate the application it errors saying that the use of P6[6] and P6[7] for SWD are preventing all sorts of SPI pins from being usable so...


      Q1 What do I need as far as SWD settings on my Debug Select drop down in the System tab?  I want to be able to write and debug code and I could use either the KitProg2 that's built in or a Miniprog 3 plugged into a JTAG header.


      Notwithstanding Q1 above, I set the Debug Select option under the System tab to 'GPIO' but it still failed to generate the application with the error message...


      Net(s) "\ADC:muxoutPlus\" span multiple amuxbus segments. This may cause analog routing to fail.




      In order to implement the connectivity specified by these nets, it is necessary to join multiple segments of the amuxbus together. This usually occurs because pins have been locked to locations which are far from their destination. While this usage is valid, it constrains routing for other nets and can lead to routing failures in congested designs. If you experience a routing failure, consider unlocking pins or moving them to a location which is closer to their destination. See the TRM and the Analog Device Editor diagram for more details.


      Q2 The analog pins I've selected clearly are not OK but are there rules to what I can do?  Do all the pins for ADC need to be on the same port for each Configuration?


      Thanks in advance.