If the uA or bits value in the Component configuration GUI is set a fixed value, IDAC will keep a stable output.
What do you mean " data update ratio"?
Do you mean if you use Some APIs, like 'IDAC7_SetValue()', to update the output of IDAC7 in run time?
I use DMA drive the IDAC, my mean's DMA transfer data ratio.
Thank a lot.
The DMA channel is triggered by a logic HIGH/1 on the tr_in terminal. The minimum width of this logic HIGH/1 is 2 system clock (SYSCLK) cycles.